LM3S328-IQN25(T) Luminary Micro, Inc., LM3S328-IQN25(T) Datasheet - Page 315
![no-image](/images/no-image-200.jpg)
LM3S328-IQN25(T)
Manufacturer Part Number
LM3S328-IQN25(T)
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
1.LM3S328-IQN25T.pdf
(359 pages)
- Current page: 315 of 359
- Download datasheet (3Mb)
October 8, 2006
Reset
Reset
Type
Type
Bit/Field
I2C Master Timer Period (I2CMTPR)
Offset 0x00C
31:8
7:0
RO
RO
31
15
0
0
Register 4: I
This register specifies the period of the SCL clock
RO
RO
30
14
0
0
reserved
Name
TPR
RO
RO
29
13
0
0
2
RO
RO
C Master Timer Period (I2CMTPR), offset 0x00C
28
12
0
0
reserved
Type
R/W
RO
RO
RO
27
11
0
0
RO
RO
26
10
0
0
Reset
0x1
0
RO
RO
25
0
9
0
Preliminary
RO
RO
24
Description
Reserved bits return an indeterminate value, and should never
be changed.
This field specifies the period of the SCL clock.
SCL_PRD = 2*(1 + TPR)*(SCL_LP +
SCL_HP)*CLK_PRD
where:
SCL_PRD is the SCL line period (I
TPR is the Timer Period register value (range of 1 to 255).
SCL_LP is the SCL Low period (fixed at 6).
SCL_HP is the SCL High period (fixed at 4).
0
8
0
reserved
R/W
RO
23
0
7
0
R/W
RO
22
0
6
0
R/W
RO
21
0
5
0
R/W
RO
20
0
4
0
TPR
2
C clock).
R/W
RO
19
0
3
0
LM3S328 Data Sheet
R/W
RO
18
0
2
0
R/W
RO
17
0
1
0
R/W
RO
16
0
0
1
315
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