AN1740 Freescale Semiconductor / Motorola, AN1740 Datasheet - Page 76

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AN1740

Manufacturer Part Number
AN1740
Description
Applications Using the Analog Subsystem on MC68HC05JJ/JP Series Microcontrollers
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
Application Note
76
Mode 0 A/D
Mode 2 A/D
Mode 2 A/D
Mode 2 A/D
Mode 2 A/D
Mode 2 A/D
Sample & hold
Sample & hold
Sample & hold
Sample & hold
Sample & hold
All analog
All analog pins
Temperature
Optional
Mode 1 A/D
Mode 3 A/D
Mode 3 A/D
Mode 3 A/D
Mode 3 A/D
features
diode
features
subsystem
Analog
feature
Check software timing to be sure that the first check of the comparator output
Make sure that the OCRL is read after each read of the OCRH. Otherwise the read
Avoid changes in ICEN, ICIE, or IEDG during charging of the external capacitor, as
In order to clear the ICF, OCF or TOF, the TSR must be read first; and then the
Presence of the ICF flag will override both the OCF and TOF flags.
Must clear OCF or TOF before clearing the ICF or another charge cycle will start
Avoid using both the analog interrupt and the input capture interrupt for detecting a
Do not change the state of the INV or VOFF bits while the voltage sample is being
Connect the channel selection bus to V
Avoid using the sample and hold method in severe noise environments as the
Avoid switching high currents with the port pins during the hold time.
Be sure to turn off the HOLD or DHOLD bits before making any changes to the
Be sure that the window on erasable EPROM devices is covered with an opaque
Be sure that the pulldowns are turned OFF when using PB0:4 for analog signal
Make sure that the analog bias is on when measuring the temperature diode. This
Make sure that the OPT bit in the MOR (EPROM devices) or the correct mask
occurs at 1/2 of the bit time (loop time between future checks).
of the OCRH will hold off future output compares until the OCRL is read.
these may cause unwanted ICF flags to be generated.
respective LSB of each related timer register must be read.
immediately when the ICF is cleared.
change in the output of comparator 2.
held on the sample capacitor.
been turned off.
noise can corrupt the sampled voltage during the hold time.
channel selection. Turn off the HOLD or DHOLD on a separate write cycle to the
AMUX register.
material such as black electrical tape. Light will affect currents, trip points, and
leakage in the analog subsystem.
processing.
can be done by setting ISEN, CP1E or CP2E in the ACR.
option is selected when either the VOFF or COE1 functions are required.
Freescale Semiconductor, Inc.
Table 7. Design Checklist (Continued)
For More Information On This Product,
Go to: www.freescale.com
Design consideration
REF
after the HOLD and DHOLD bits have
MOTOROLA
number
4, 6, 22,
to page
44,
Refer
71-72
AN1740
63
65
44
65
24
38
39
39
38
40
38
42
41
40
66

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