CY29352 Cypress Semiconductor, CY29352 Datasheet - Page 3

• Manufacturer Part Number: CY29352
• Description: 11 Output Zero Delay Buffer
• Manufacturer: Cypress Semiconductor

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Table 2. Frequency Table
Table 3. Function Table
Absolute Maximum Conditions
Document Number: 38-07476 Rev. *B
VCO_SEL
PLL_EN#
MR/OE#
SELA
SELB
SELC
V
V
V
V
V
LU
R
T
T
T
Ø
Ø
ESD
FIT
Parameter
A
DD
DD
IN
OUT
TT
S
J
PS
JC
JA
VCO_SEL
H
Control
0
0
0
1
1
1
DC supply voltage
DC operating voltage
DC input voltage
DC output voltage
Output termination voltage
Latch up immunity
Power supply ripple
Temperature, storage
Temperature, operating ambient
Temperature, junction
Dissipation, junction to case
Dissipation, junction to ambient
ESD protection (human body model)
Failure in time
Feedback Output
Divider
Default
÷2
÷4
÷6
÷2
÷4
÷6
0
0
0
0
0
0
Description
VCO
PLL enabled, the VCO output connects
to the output dividers
Outputs enabled
QA = VCO ÷ 4
QB = VCO ÷ 4
QC = VCO ÷ 2
Input clock * 2
Input clock * 4
Input clock * 6
Input clock * 4
Input clock * 8
Input clock * 12
VCO
Functional
Relative to V
Relative to V
Functional
Ripple frequency < 100 kHz
Non functional
Functional
Functional
Functional
Functional
Manufacturing test
0
100 MHz to 200 MHz
50 MHz to 125 MHz
33.33 MHz to 83.33 MHz
50 MHz to 125 MHz
25 MHz to 62.5 MHz
16.67 MHz to 41.67 MHz
Input Frequency Range
Condition
SS
SS
(AVDD = 3.3V)
VCO ÷ 2
Bypass mode, PLL disabled, the input clock
connects to the output dividers
Outputs disabled (three-state), VCO runs at its
minimum frequency
QA = VCO ÷ 6
QB = VCO ÷ 2
QC = VCO ÷ 4
2.375
2000
–0.3
–0.3
–0.3
Min
200
–65
–40
100 MHz to 200 MHz
50 MHz to 100 MHz
33.33 MHz to 66.67 MHz
50 MHz to 100 MHz
25 MHz to 50 MHz
16.67 MHz to 33.33 MHz
Input Frequency Range
10
1
V
V
V
DD
DD
(AVDD = 2.5V)
3.465
+150
DD
Max
150
+85
155
105
5.5
42
+ 0.3
+ 0.3
÷ 2
CY29352
mVp-p
°C/W
°C/W
Volts
Unit
ppm
mA
°C
°C
°C
V
V
V
V
V
Page 3 of 9
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