CY29352 Cypress Semiconductor, CY29352 Datasheet - Page 5

• Manufacturer Part Number: CY29352
• Description: 11 Output Zero Delay Buffer
• Manufacturer: Cypress Semiconductor

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AC Parameters
Document Number: 38-07476 Rev. *B
f
f
f
t
f
DC
t
t
t
t
t
t
BW
t
t
t
t
VCO
in
refDC
r
MAX
r
(φ)
sk(O)
sk(B)
PLZ, HZ
PZL, ZH
JIT(CC)
JIT(PER)
JIT(φ)
LOCK
Parameter
, t
, t
f
f
[6]
VCO frequency
Input frequency
Input duty cycle
TCLK input rise and fall time
Maximum output frequency
Output duty cycle
Output rise and fall times
Propagation delay (static phase
offset)
Output to output skew
Bank to bank skew
Output disable time
Output enable time
PLL closed loop bandwidth
(–3 dB)
Cycle to cycle jitter
Period jitter
IO phase jitter
Maximum PLL lock time
(V
DD
= 2.5V ± 5%, T
Description
A
= –40°C to +85°C)
÷2 feedback
÷4 feedback
÷6 feedback
÷8 feedback
÷12 feedback
Bypass mode (PLL_EN# = 1)
0.7V to 1.7V
÷2 output
÷4 output
÷6 output
÷8 output
÷12 output
f
f
0.6V to 1.8V
TCLK to FB_IN, same V
does not include jitter
Skew within bank
Banks at same voltage, same
frequency
Banks at same voltage,
different frequency
÷2 feedback
÷4 feedback
÷6 feedback
÷8 feedback
÷12 feedback
Same frequency
Multiple frequencies
Same frequency
Multiple frequencies
VCO < 300 MHz
VCO > 300 MHz
MAX
MAX
> 100 MHz
< 100 MHz
Condition
DD
,
33.33
16.67
33.33
16.67
-100
Min
200
100
100
0.1
50
25
25
50
25
47
44
0
1–1.5
0.75
Typ
150
100
0.6
0.5
2
66.67
33.33
66.67
33.33
Max
200
125
400
200
100
200
100
100
175
225
100
300
100
150
1.0
1.0
50
75
50
53
56
10
8
1
CY29352
MHz
MHz
MHz
MHz
Unit
Page 5 of 9
ms
ns
ps
ns
ns
ps
ns
ps
ps
ps
ps
%
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