AN2492 Freescale Semiconductor / Motorola, AN2492 Datasheet - Page 12

• Manufacturer Part Number: AN2492
• Description: MPC184 Descriptor Programmers Guide--PCI View
• Manufacturer: Freescale Semiconductor / Motorola

Execution Unit Mode Data
Execution Unit Mode Data
4.5 RNG Mode Register
The RNG mode register is used to control the RNG. One operational mode, randomizing, is defined. Writing
any other value than 0 to 7:0 results in a data error interrupt that is reflected in the RNG interrupt status
register. The mode register also reflects the value of burst size, which is loaded by the crypto-channel during
normal operation with the MPC184 as an initiator. Burst size is not relevant to target mode operations, where
an external host pushes and pulls data from the execution units.
The mode register is cleared when the RNG is reset or re-initialized. The RNG mode register is shown in
Figure 9.
Table 7 describes the RNG mode register signals.
4.6 AESU Mode Register
The AESU mode register contains 4 bits which are used to program the AESU. It also reflects the value of
burst size, which is loaded by the crypto-channel during normal operation with the MPC184 as an initiator.
Burst size is not relevant to target mode operations, where an external host pushes and pulls data from the
execution units.
The mode register is cleared when the AESU is reset or re-initialized. Setting a reserved mode bit will
generate a data error. If the mode register is modified during processing, a context error will be generated.
The AESU mode register is shown in Figure 10.
12
31:11
10:8
Bits
Reset
Reset
7:0
Field
Field
Addr
Addr
R/W
R/W
31
31
Burst Count
Signal
—
—
MPC184 Descriptor Programmer’s Guide— PCI View
Reserved, must be set to zero.
processed with a single key/context. The RNG signals to the crypto-channel that a ‘burst
size’ amount of data is available to be pulled from the FIFO.
Note: The inclusion of this field in the RNG mode register is to avoid confusing a user who
may read this register in debug mode. Burst size should not be written directly to the RNG.
Reserved
The MPC184 implements flow control to allow larger than FIFO sized blocks of data to be
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Reserved
Table 7. RNG Mode Register Definitions
Figure 9. RNG Mode Register
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Reserved
0x0E000
0x0E004
R/W
R/W
0
0
11
Description
Burst Count
10
8
7
Reserved
MOTOROLA
0
0