AN2492 Freescale Semiconductor / Motorola, AN2492 Datasheet - Page 3

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AN2492

Manufacturer Part Number
AN2492
Description
MPC184 Descriptor Programmers Guide--PCI View
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
3 Descriptor Header
Descriptors are created by the host to guide the MPC184 through required cryptographic operations. The
descriptor header defines the operations to be performed, the mode for each operation, and the ordering of
the inputs and outputs in the body of the descriptor. The MPC184 device drivers allow the host to create
proper headers for each cryptographic operation. Figure 2 shows the descriptor header.
Table 1 defines the header bits.
MOTOROLA
31:20
19:8
Bits
Reset
7:4
3:2
Field
Addr
1
R/W
31
Desc_Type
Name
Op_0
Op_1
ST
Channel_1 0x02080, Channel_2 0x03080, Channel_3 0x04080, Channel_4 0x05080
Op_0
MPC184 Descriptor Programmer’s Guide— PCI View
Op_0 contains two sub fields, EU_Select and Mode_Data. Figure 3 shows the sub field
detail.
EU_SELECT[31:28]—Programs the channel to select a primary EU of a given type.
Table 2 lists the possible EU_SELECT values.
MODE_DATA[27:20]—Programs the primary EU mode data.
The mode data is specific to the chosen EU. This data is passed directly to bits 7:0 of the
specified EU mode register.
Op_1 contains two sub fields, EU_Select and Mode_Data. Figure 3 shows the sub field
detail.
EU_SELECT[19:16]—Programs the channel to select a secondary EU of a given type.
Table 2 lists the possible EU_SELECT values.
MODE_DATA[15:8]—Programs the secondary EU mode data.
The mode data is specific to the chosen EU. This data is passed directly to bits 7:0 of the
specified EU mode register.
Note: The MDEU is the only valid secondary EU. Values for Op1 EU_SELECT other than
‘MDEU’ or ‘no secondary CHA selected’ will result in an ‘unrecognized header’ error
condition. Selecting MDEU for both primary and secondary EU will also create an error
condition.
Descriptor type—Each type of descriptor determines the following attributes for the
corresponding data length/pointer pairs: the direction of the data flow; which EU is
associated with the data; and which internal EU address is used.
Table 9 lists the valid types of descriptors.
Reserved—set to zero
Snoop type—Selects which of the two types of available snoop modes applies to the
descriptor. See Figure 11 for a graphical representation of the snooping concept.
0 Snoop output data mode
1 Snoop input data mode
In ‘snoop input data mode,’ while the bus transaction to write data into the input FIFO of
the primary EU is in progress, the secondary EU (always MDEU) will snoop the same data
into its input FIFO.
In ‘snoop output data mode’, the secondary EU (always MDEU) will snoop data into its
input FIFO during the bus transaction to read data out of the output FIFO of the primary EU.
Freescale Semiconductor, Inc.
For More Information On This Product,
20
Table 1. Header Bit Definitions
Figure 2. Descriptor Header
19
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Op_1
0x0000_0000
R/W
Description
8
7
Desc_TYPE
4
3
RSVD
Descriptor Header
2
ST
1
DN
0
3

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