AN2502 Freescale Semiconductor / Motorola, AN2502 Datasheet - Page 13
AN2502
Manufacturer Part Number
AN2502
Description
Using Two Channels of the HC08 TIM to Achieve a Full-Duplex Software SCI
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
1.AN2502.pdf
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MOTOROLA
Using Two Channels of the HC08 TIM to Achieve a Full-Duplex Software SCI
If the parity bit is enabled (PEN = 1), an extra output compare is done after the
last data bit reception. The parity bit is received and compared with the value
computed from the data bits previously received. The parity error
if the computed value from the data bits differs from the one being received.
The polarity of the parity bit is configured in the
rSCCR.
RPTY
is used for the calculation of the parity error. The formula for computing the
parity error is:
Table 3
Freescale Semiconductor, Inc.
For More Information On This Product,
is the bit in which the parity for the received data is calculated. This flag
RPTY = Data bit (0) ⊕ Data bit (1) ⊕ … ⊕ Data bit (N-1)
PE = RPTY ⊕ PTY
Table 2
summarizes the parity error combinations.
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shows the parity bit configurations.
0.3 BIT-TIME
Table 2. Parity Bit Configuration Bits
PEN
PEN
0
1
1
0
0
1
1
Table 3. Parity Error Truth Table
Figure 23. Parity Bit Reception
PTY
PTY
X
0
1
0
1
0
1
1 BIT-TIME
DATA BIT
LAST
Parity Configuration
Parity Error
Even parity
Odd parity
No parity
No error
No error
Error
Error
PTY
PARITY BIT
configuration bit in the
PE
flag is set
AN2502/D
Modes
13
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