EM6517 ETC, EM6517 Datasheet - Page 12

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EM6517

Manufacturer Part Number
EM6517
Description
4 BIT MICROCONTROLLER
Manufacturer
ETC
Datasheet
6
6.1 Oscillator
A built-in crystal oscillator generates the system-operating clock for the CPU and peripheral blocks, from an
externally connected crystal (typically 32.768kHz). The regulated voltage, Vreg, supplies the oscillator circuit. In
sleep mode the oscillator is stopped.
EM’s special design techniques guarantee the low current consumption of this oscillator. The external
impedance between the oscillator pads must be greater than 10MOhm. EM Microelectronic-Marin SA must
confirm connection of any other components to the two oscillator pads.
6.2 Prescaler
The prescaler consists of fifteen elements divider chain which delivers clock signals for the peripheral circuits
such as timer/counter, buzzer, LCD voltage multiplier, debouncer and edge detectors, as well as generating
prescaler interrupts. The input to the prescaler is the system clock signal. Power on initializes to Hex (0001).
Table 6.2.1 Prescaler Clock Name Definition
Table 6.2.2 Control of Prescaler Register RegPresc
With DebSel = 1 one may choose either the Ck[11] or Ck[14] debouncer frequency by selecting the
corresponding metal mask option ( ROM Version only ). Relative to 32kHz the corresponding max. debouncer
times are then 2 ms or 0.25 ms. For the metal mask selection refer to chapter 19.1.4.
Switching the PrIntSel may generate an interrupt request. Avoid it with MaskIRQ32/8 = 0 selection during the
switching operation.
The prescaler contains 2 interrupt sources:
- IRQ32/8 ; this is Ck[6] or Ck[4] positive edge interrupt, the selection is depending on bit PrIntSel.
- IRQHz1 ; this is Ck[1] positive edge interrupt
There is no interrupt generation on reset.
The first IRQHz1 Interrupt occurs 1 sec (32kHz) after reset.
© EM Microelectronic-Marin SA, 09/99, Rev. A/277
12
Bit
3
2
1
0
System clock / 128
System clock / 32
System clock / 64
System clock/ 16
Oscillator and Prescaler
System clock / 2
System clock / 4
System clock / 8
Name
PWMOn
ResPresc
PrIntSel
DebSel
System clock
Function
Reset
0
0
0
0
R/W
R/W
R/W
R/W
R/W
Ck[16]
Ck[15]
Ck[14]
Ck[13]
Ck[12]
Ck[11]
Ck[10]
Name
ck [9]
FOR ENGINEERING ONLY
Description
see 10 bit counter
Write Reset prescaler
1 -> Resets the divider chain
0 -> No action.
The Read value is always ’0’
Interrupt select.
0 -> Interrupt from Ck[4]
1 -> Interrupt from Ck[6]
Debouncer clock select.
0 -> Debouncer with Ck[8]
1 -> Debouncer with Ck[11]
or Ck[14]
from Ck[14] down to
Ck[2], sets Ck[1].
32 KHz Xtal
16384 Hz
32768 Hz
8192 Hz
4096 Hz
2048 Hz
1024 Hz
512 Hz
256 Hz
System clock / 16384
System clock / 32768
System clock / 1024
System clock / 2048
System clock / 4096
System clock / 8192
System clock / 256
System clock / 512
Figure 11. Prescaler Frequency Timing
Function
Prescaler Reset
System Clock
Ck[16]
Ck[15]
Ck[14]
Ck[2]
Ck[1]
First positive edge of 1 Hz clock is 1s after
Horizontal Scale Change
Name
Ck[8]
Ck[7]
Ck[6]
Ck[5]
Ck[4]
Ck[3]
Ck[2]
Ck[1]
the falling reset edge
EM6517
32 KHz Xtal
128 Hz
64 Hz
32 Hz
16 Hz
1 Hz
8 Hz
4 Hz
2 Hz

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