EM6517 ETC, EM6517 Datasheet - Page 38

• Manufacturer Part Number: EM6517
• Description: 4 BIT MICROCONTROLLER
• Manufacturer: ETC

12 Supply Voltage Level Detector
The EM6517-1 has a built-in Supply Voltage Level Detector (SVLD) circuitry, such that the CPU can compare
the supply voltage against a pre-selected value. During sleep mode this function is inhibited.
The CPU activates the supply voltage level
detector by writing VldStart = 1 in the register
RegVldCntl. The actual measurement starts on
the next Ck[9] rising edge and lasts during the
Ck[9] high period (2 ms at 32 KHz). The busy
flag VldBusy stays high from VldStart set until
the measurement is finished. The worst case
time until the result is available is 1.5 Ck[9]
prescaler clock periods (32 KHz -> 6 ms). The
detection level must be defined in register
RegVldLevel before the VldStart bit is set.
During the actual measurement (2 ms) the
device will draw an additional 5 µA of I
current. After the end of the measure the result
is available by inspection of the bit VldResult.
An interrupt IRQVLD is send to indicate the end
of measure. If the result is read 0, then the
power supply voltage was greater than the detection level value. If read 1, the power supply voltage was lower
than the detection level value. During each read while Busy=1 the VldResult is not guaranteed. The interrupt
request can be masked (default) (MaskIRQVLD bit).
12.1 SVLD Register
Table 12.1.1 register RegVldCntl
Table 12.1.2 Voltage level detector value selecting
© EM Microelectronic-Marin SA, 09/99, Rev. A/277
38
Bit
3
2
2
1
0
R*; VLDResult is not guaranteed while VLDBusy=1
Level1
Level2
Level3
Level3
Level
VLDResult
VLDlevel1
VLDlevel0
VLDBusy
VLDStart
Name
FOR ENGINEERING ONLY
VldLevel1
0
0
1
1
Reset
0
0
0
0
0
VDD
Figure 28. SVLD Timing Diagram
Compare Level
Ck[9] (256 Hz)
R/W
R/W
R/W
VBAT =V
VldLevel0
R*
Read Result
W
R
Busy Flag
Measure
0
1
0
1
Result
DD
CPU starts
measure
SVLD < VBAT
Vld level selection
Vld level selection
Vld result flag
Vld busy flag
Typical voltage level
Description
0
Vld start
2.2
2.5
3.0
3.0
CPU starts
measure
SVLD > VBAT
EM6517
1