EM6517 ETC, EM6517 Datasheet - Page 40

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EM6517

Manufacturer Part Number
EM6517
Description
4 BIT MICROCONTROLLER
Manufacturer
ETC
Datasheet
Any interrupt request sent by a periphery cell while the corresponding mask is not set will not be stored in the
interrupt request register. All interrupt requests are stored in their IRQxx registers depending only on their mask
setting and not on the general interrupt enable status.
Whenever the EM6517-1 goes into HALT Mode the IntEn bit is automatically set to 1, thus allowing to resume
from halt mode with an interrupt. This behavior is blocked if SWBAuto is set high. In this case the peripheral
interrupts are disabled until the SWBAuto bit is reset low. Please refer also to the SWB chapter 9.
13.1 Interrupt control registers
Table 13.1.1 register RegIRQ1
Table 13.1.2 register RegIRQ2
Table 13.1.3 register RegIRQ3
Table 13.1.4 register RegIRQMask1
Table 13.1.5 register RegIRQMask2
Table 13.1.6 register RegIRQMask3
14 RAM
The EM6517-1 has two 64x4 bit RAM’s built-in.
© EM Microelectronic-Marin SA, 09/99, Rev. A/277
40
W*; Writing of 1 clears the corresponding bit.
W*; Writing of 1 clears the corresponding bit.
W*; Writing of 1 clears the corresponding bit.
Interrupt is not stored if the mask bit is 0.
Interrupt is not stored if the mask bit is 0.
Interrupt is not stored if the mask bit is 0
Bit
Bit
Bit
3
2
1
0
3
2
1
0
3
2
1
0
Bit
Bit
Bit
3
2
1
0
3
2
1
0
3
2
1
0
MaskIRQCntComp
MaskIRQHz32/8
MaskIRQCount0
MaskIRQPA[3]
MaskIRQPA[2]
MaskIRQPA[1]
MaskIRQPA[0]
MaskIRQADC
MaskIRQEEP
MaskIRQVLD
MaskIRQHz1
IRQCntComp
IRQCount0
IRQHz32/8
IRQPA[3]
IRQPA[2]
IRQPA[1]
IRQPA[0]
IRQADC
Name
Name
Name
IRQEEP
IRQVLD
IRQHz1
Name
Name
Name
--
--
FOR ENGINEERING ONLY
Reset
Reset
Reset
Reset
Reset
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W*
R/W*
R/W*
R/W*
R/W*
R/W*
R/W*
R/W*
R/W*
R/W*
R/W*
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Port A PA[3] interrupt request
Port A PA[2] interrupt request
Port A PA[1] interrupt request
Port A PA[0] interrupt request
Prescaler interrupt request
Prescaler interrupt request
EEPROM interrupt request
Port A PA[3] interrupt mask
Port A PA[2] interrupt mask
Port A PA[1] interrupt mask
Port A PA[0] interrupt mask
Counter interrupt request
Counter interrupt request
EEPROM interrupt mask
Prescaler interrupt mask
Prescaler interrupt mask
Counter interrupt mask
Counter interrupt mask
ADC interrupt request
VLD interrupt request
ADC interrupt mask
VLD interrupt mask
Description
Description
Description
Description
Description
Description
EM6517

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