ADP3208 ON Semiconductor, ADP3208 Datasheet - Page 32

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ADP3208

Manufacturer Part Number
ADP3208
Description
7-bit, Programmable, Dual-phase, Mobile, Cpu, Synchronous Buck Controller
Manufacturer
ON Semiconductor
Datasheet

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0
ADP3208
RAMP RESISTOR SELECTION
The ramp resistor (R
ramp. The value of this resistor is chosen to provide the best
combination of thermal balance, stability, and transient response.
Use the following expression to determine a starting value:
where:
A
A
R
C
Another consideration in the selection of R
internal ramp voltage (see Equation 21). For stability and noise
immunity, keep the ramp size larger than 0.5 V. Taking this into
consideration, the value of R
The internal ramp voltage magnitude can be calculated as follows:
The size of the internal ramp can be increased or decreased. If it
is increased, stability and transient response improves but
thermal balance degrades. Conversely, if the ramp size is
decreased, thermal balance improves but stability and transient
response degrade. In the denominator of Equation 20, the factor
of 3 sets the minimum ramp size that produces an optimal
combination of good stability, transient response, and thermal
balance.
COMP PIN RAMP
In addition to the internal ramp, there is a ramp signal on the
COMP pin due to the droop voltage and output voltage ramps.
This ramp amplitude adds to the internal ramp to produce the
following overall ramp signal at the PWM input:
where C
resistance of the regulator.
For this example, the overall ramp signal is 1.85 V.
DS
R
R
D
is the internal ramp amplifier gain.
is the internal ramp capacitor value.
is the current balancing amplifier gain.
is the total low-side MOSFET on resistance.
V
V
V
R
R
R
R
R
R
RT
X
=
=
=
=
=
is the total bulk capacitance, and R
3
A
0
3
280
×
2 .
R
×
1
R
×
A
5
×
R
0
×
D
1 (
1 (
2 .
A
×
n
3
×
R
C
×
×
4 .
2
×
R
R
×
R
330
. 0
D
f
×
) is used to set the size of the internal PWM
DS
5
SW
×
L
076
)
V
(
1
×
pF
×
f
R
nH
×
SW
V
×
C
)
n
C
×
VID
×
5
R
R
×
300
X
. 1
pF
in this example is selected as 280 kΩ.
D
×
3475
)
R
kHz
=
O
256
V
=
. 0
59
R
V
O
is the size of the
is the droop
Rev. 1 | Page 32 of 38 | www.onsemi.com
(20)
(21)
(22)
CURRENT LIMIT SETPOINT
To select the current limit setpoint, the resistor value for R
be determined. The current limit threshold for the ADP3208 is
set with R
where:
R
inductor switch node to the current sense amplifier.
R
R
n is the number of phases.
I
If R
than expected and require an adjustment of R
example, I
supply. For this example, choosing 60 A for I
R
The following equation determines the per phase current limit
previously described:
where:
V
V
A
Using a V
resistance at 150°C) results in a per phase limit of 83 A. Although
this number may seem high, this current level can be achieved
using only an absolute short at the output, and the current limit
latch-off function shuts down the regulator before overheating
can occur.
This limit can be adjusted by changing the ramp voltage, V
However, the per phase limit must be set to be greater than the
average per phase current (I
There is also a per phase initial duty cycle limit at the maximum
input voltage:
For this example, the duty cycle limit at the maximum input
voltage is 0.3 V when D is 0.076.
CLIM
PH
CS
SENSE
CLIM
COMP(MAX)
BIAS
D
is the current-balancing amplifier gain and is 5.
is the current sense amplifier feedback resistor.
CLIM
is the resistor connecting the current sense resistor or
is the current limit setpoint.
is the COMP pin bias voltage and is 1.0 V.
R
of 126 kΩ, and the closest 1% standard resistance is 127 kΩ.
I
D
is the sense current resistor or the inductor DCR.
PHLIM
CLIM
LIM
is greater than 500 kΩ, the current limit may be lower
CLIM
R
CLIM
is the maximum COMP voltage and is 3.3 V.
=
of 0.59 V and a R
=
=
D
. R
R
V
is the average current limit for the output of the
MIN
CS
COMP
CLIM
×
×
A
10
R
can be found using the following equation:
(
V
MAX
D
PH
×
COMP
×
R
×
R
)
SENSE
10
DS
(
V
MAX
CLIM
(
DS(MAX)
μA
MAX
V
R
×
R
/n).
)
×
I
)
V
CLIM
n
BIAS
V
of 3.8 mΩ (low-side on
BIAS
×
2
I
2
R
CLIM
CLIM
results in an
. In this
CLIM
must
R
.
(23)
(24)
(25)

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