LM3S1150 Luminary Micro, Inc, LM3S1150 Datasheet - Page 10

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LM3S1150

Manufacturer Part Number
LM3S1150
Description
Lm3s1150 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet

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Table of Contents
List of Tables
Table 1.
Table 2.
Table 3-1.
Table 4-1.
Table 4-2.
Table 5-1.
Table 5-2.
Table 6-1.
Table 7-1.
Table 8-1.
Table 8-2.
Table 8-3.
Table 9-1.
Table 9-2.
Table 9-3.
Table 10-1.
Table 10-2.
Table 10-3.
Table 11-1.
Table 12-1.
Table 13-1.
Table 14-1.
Table 14-2.
Table 14-3.
Table 15-1.
Table 15-2.
Table 15-3.
Table 15-4.
Table 15-5.
Table 16-1.
Table 17-1.
Table 19-1.
Table 19-2.
Table 19-3.
Table 19-4.
Table 19-5.
Table 19-6.
Table 19-7.
Table 19-8.
Table 20-1.
Table 20-2.
Table 21-1.
Table 21-2.
Table 21-3.
Table 21-4.
Table 21-5.
10
Revision History .............................................................................................................. 18
Documentation Conventions ............................................................................................ 20
Memory Map ................................................................................................................... 43
Exception Types .............................................................................................................. 45
Interrupts ........................................................................................................................ 46
JTAG Port Pins Reset State ............................................................................................. 50
JTAG Instruction Register Commands ............................................................................... 55
System Control Register Map ........................................................................................... 67
Hibernation Module Register Map ................................................................................... 127
Flash Protection Policy Combinations ............................................................................. 141
Flash Resident Registers ............................................................................................... 143
Flash Register Map ........................................................................................................ 144
GPIO Pad Configuration Examples ................................................................................. 168
GPIO Interrupt Configuration Example ............................................................................ 168
GPIO Register Map ....................................................................................................... 169
Available CCP Pins ........................................................................................................ 206
16-Bit Timer With Prescaler Configurations ..................................................................... 209
Timers Register Map ...................................................................................................... 215
Watchdog Timer Register Map ........................................................................................ 242
UART Register Map ....................................................................................................... 270
SSI Register Map .......................................................................................................... 316
Examples of I
Inter-Integrated Circuit (I
Write Field Decoding for I2CMCS[3:0] Field (Sheet 1 of 3) ................................................ 359
Comparator 0 Operating Modes ..................................................................................... 379
Comparator 1 Operating Modes ..................................................................................... 379
Comparator 2 Operating Modes ...................................................................................... 380
Internal Reference Voltage and ACREFCTL Field Values ................................................. 380
Analog Comparators Register Map ................................................................................. 382
PWM Register Map ........................................................................................................ 396
QEI Register Map .......................................................................................................... 429
Signals by Pin Number ................................................................................................... 445
Signals by Signal Name ................................................................................................. 449
Signals by Function, Except for GPIO ............................................................................. 454
GPIO Pins and Alternate Functions ................................................................................. 457
Signals by Pin Number ................................................................................................... 458
Signals by Signal Name ................................................................................................. 463
Signals by Function, Except for GPIO ............................................................................. 468
GPIO Pins and Alternate Functions ................................................................................. 471
Temperature Characteristics ........................................................................................... 473
Thermal Characteristics ................................................................................................. 473
Maximum Ratings .......................................................................................................... 474
Recommended DC Operating Conditions ........................................................................ 474
LDO Regulator Characteristics ....................................................................................... 475
Detailed Power Specifications ........................................................................................ 476
Flash Memory Characteristics ........................................................................................ 477
2
C Master Timer Period versus Speed Mode ............................................... 345
2
C) Interface Register Map ......................................................... 354
Preliminary
July 26, 2008

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