LM3S1439 Luminary Micro, Inc, LM3S1439 Datasheet - Page 36

• Manufacturer Part Number: LM3S1439
• Description: Lm3s1439 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Architectural Overview
1.4.4.3
1.4.5
1.4.5.1
1.4.5.2
36
Each SSI module can be configured as either a master or slave device. As a slave device, the SSI
module can also be configured to disable its output, which allows a master device to be coupled
with multiple slave devices.
Each SSI module also includes a programmable bit rate clock divider and prescaler to generate the
output serial clock derived from the SSI module's input clock. Bit rates are generated based on the
input clock and the maximum bit rate is determined by the connected peripheral.
I
The Inter-Integrated Circuit (I
(a serial data line SDA and a serial clock line SCL).
The I
devices, LCDs, tone generators, and so on. The I
diagnostic purposes in product development and manufacture.
The LM3S1439 controller includes one I
IC devices over an I
and read) data.
Devices on the I
both sending and receiving data as either a master or a slave, and also supports the simultaneous
operation as both a master and a slave. The four I
Slave Transmit, and Slave Receive.
A Stellaris
Both the I
a transmit or receive operation completes (or aborts due to an error). The I
interrupts when data has been sent or requested by a master.
System Peripherals
Programmable GPIOs (see page 163)
General-purpose input/output (GPIO) pins offer flexibility for a variety of connections.
The Stellaris
individual GPIO port. The GPIO module is FiRM-compliant (compliant to the ARM Foundation IP
for Real-Time Microcontrollers specification) and supports 14-52 programmable input/output pins.
The number of GPIOs available depends on the peripherals being used (see “Signal Tables” on page
476 for the signals available to each GPIO pin).
The GPIO module features programmable interrupt generation as either edge-triggered or
level-sensitive on all pins, programmable control for GPIO pad configuration, and bit masking in
both read and write operations through address lines. Pins configured as digital inputs are
Schmitt-triggered.
Three Programmable Timers (see page 205)
Programmable timers can be used to count or time external events that drive the Timer input pins.
The Stellaris
block provides two 16-bit timers/counters that can be configured to operate independently as timers
or event counters, or configured to operate as one 32-bit timer or one 32-bit Real-Time Clock (RTC).
Timers can also be used to trigger analog-to-digital (ADC) conversions.
2
C (see page 375)
2
C bus interfaces to external I
2
®
C master and slave can generate interrupts. The I
I
®
®
2
C module can operate at two speeds: Standard (100 Kbps) and Fast (400 Kbps).
GPIO module is comprised of eight physical GPIO blocks, each corresponding to an
General-Purpose Timer Module (GPTM) contains three GPTM blocks. Each GPTM
2
C bus can be designated as either a master or a slave. The I
2
C bus. The I
2
C) bus provides bi-directional data transfer through a two-wire design
2
2
C bus supports devices that can both transmit and receive (write
C devices such as serial memory (RAMs and ROMs), networking
Preliminary
2
C module that provides the ability to communicate to other
2
2
C bus may also be used for system testing and
C modes are: Master Transmit, Master Receive,
2
C master generates interrupts when
2
C slave generates
2
C module supports
July 25, 2008