LM3S1439 Luminary Micro, Inc, LM3S1439 Datasheet - Page 478

• Manufacturer Part Number: LM3S1439
• Description: Lm3s1439 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Signal Tables
478
Pin Number
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
Pin Name
XOSC0
XOSC1
VDD25
CMOD0
OSC0
OSC1
WAKE
VBAT
PWM5
PWM4
CCP0
GND
PF7
PF6
VDD
GND
PF5
PF0
HIB
GND
VDD
GND
PF4
PF3
PF2
PF1
GND
RST
PB0
NC
NC
Preliminary
Pin Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
-
-
-
-
-
-
-
-
-
-
-
I
I
I
I
Buffer Type
Analog
Analog
Analog
Analog
Power
Power
Power
Power
Power
Power
Power
Power
Power
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
-
-
-
Description
Ground reference for logic and I/O pins.
No connect. Leave the pin electrically
unconnected/isolated.
No connect. Leave the pin electrically
unconnected/isolated.
GPIO port F bit 7
GPIO port F bit 6
Positive supply for I/O and some logic.
Ground reference for logic and I/O pins.
GPIO port F bit 5
GPIO port F bit 0
Main oscillator crystal input or an external
clock reference input.
Main oscillator crystal output.
An external input that brings the processor out
of hibernate mode when asserted.
An output that indicates the processor is in
hibernate mode.
Hibernation Module oscillator crystal input or
an external clock reference input. Note that
this is either a 4.19-MHz crystal or a
32.768-kHz oscillator for the Hibernation
Module RTC. See the CLKSEL bit in the
HIBCTL register.
Hibernation Module oscillator crystal output.
Ground reference for logic and I/O pins.
Power source for the Hibernation Module. It
is normally connected to the positive terminal
of a battery and serves as the battery
backup/Hibernation Module power-source
supply.
Positive supply for I/O and some logic.
Ground reference for logic and I/O pins.
GPIO port F bit 4
GPIO port F bit 3
PWM 5
GPIO port F bit 2
PWM 4
GPIO port F bit 1
Positive supply for most of the logic function,
including the processor core and most
peripherals.
Ground reference for logic and I/O pins.
System reset input.
CPU Mode bit 0. Input must be set to logic 0
(grounded); other encodings reserved.
GPIO port B bit 0
Capture/Compare/PWM 0
July 25, 2008