MT18VDDT3272 Micron, MT18VDDT3272 Datasheet - Page 13

• Manufacturer Part Number: MT18VDDT3272
• Description: 184-Pin Registered DDR SDRAM DIMMs (x72)
• Manufacturer: Micron

I
(Notes: 1-5, 8, 10, 12; notes appear following parameter tables)
(0°C
32, 64 Meg x 72 DDR SDRAM DIMMs
DD18C32_64X72AG_B.p65–Rev. B, Pub. 1/02
*DRAM components only
a - Value calculated as one module bank in this operating condition, and all other module banks in I
b - Value calculated reflects all module banks in this operating condition.
PARAMETER/CONDITION
OPERATING CURRENT: One device bank; Active-Precharge;
t
once per clock cyle; Address and control inputs changing once
every two clock cycles;
OPERATING CURRENT: One device bank; Active-Read-Precharge;
Burst = 2;
Address and control inputs changing once per clock cycle
PRECHARGE POWER-DOWN STANDBY CURRENT: All device banks
idle; Power-down mode;
IDLE STANDBY CURRENT: CS# = HIGH; All device banks idle;
changing once per clock cycle. V
ACTIVE POWER-DOWN STANDBY CURRENT: One device bank active;
Power-down mode;
ACTIVE STANDBY CURRENT: CS# = HIGH; CKE = HIGH; One device
bank; Active-Precharge;
DM andDQS inputs changing twice per clock cycle; Address and
other control inputs changing once per clock cycle
OPERATING CURRENT: Burst = 2; Reads; Continuous burst;
One bank active; Address and control inputs changing once per
clock cycle;
OPERATING CURRENT: Burst = 2; Writes; Continuous burst;
One device bank active; Address and control inputs changing once
per clock cycle;
twice per clock cycle
AUTO REFRESH CURRENT
OPERATING CURRENT: Four device bank interleaving READs (BL=4)
with auto precharge,
control inputs change only during Active READ, or WRITE commands.
DD
t
RC =
SELF REFRESH CURRENT: CKE
CK =
SPECIFICATIONS AND CONDITIONS* 512MB Module
t
T
RC (MIN);
t
A
CK MIN; CKE = HIGH; Address and other control inputs
t
RC =
+70°C; V
t
CK =
t
t
t
CK =
RC (MIN);
CK =
t
CK (MIN); I
DD
t
t
CK =
RC =
t
Q = +2.5V ±0.2V, V
t
CK (MIN); DQ, DM, and DQS inputs changing
CK (MIN); DQ, DM and DQS inputs changing
t
RC =
t
CK =
t
t
t
CK (MIN); CKE = LOW
RC (MIN);
CK =
OUT
t
RAS (MAX);
t
CK (MIN); CKE = (LOW)
0.2V
t
= 0mA
IN
CK (MIN); I
= V
t
CK =
REF
DD
for DQ, DQS, and DM
t
t
CK (MIN); Address and
CK =
OUT
= +2.5V ±0.2V)
= 0mA;
t
CK (MIN); DQ,
t
t
RC =
RC = 7.8125µs
13
t
RC(MIN)
Micron Technology, Inc., reserves the right to change products or specifications without notice.
184-pin DDR SDRAM DIMMs
256MB, 512MB (ECC x72)
SYMBOL
I
I
I
I
I
I
DD
I
DD
I
I
I
DD
DD
DD
DD
I
I
DD
DD
DD
DD
DD
DD
4W
3N
2P
2F
3P
4R
5
6
7
8
0
1
b
b
b
a
a
a
b
b
b
b
a
a
-26A/ -265
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
630
630
108
54
DD
MAX
2P (CKE LOW) Mode.
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
-202
540
540
108
54
UNITS
©2002, Micron Technology, Inc.
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
21, 28,
21, 28,
20, 43
20, 43
20, 43
24, 45
24, 45
NOTES
20, 44
45
46
45
20
20
9