CLA90000 Zarlink Semiconductor, CLA90000 Datasheet - Page 10

• Manufacturer Part Number: CLA90000
• Description: High Density CMOS Gate Arrays
• Manufacturer: Zarlink Semiconductor

Example delays for mixed 3V and 5V I/O (ns)
Delays for mixed 3 and 5V I/O are not the same as for sin-
gle voltage designs because of level shifting stages.
3V I/O in a mixed 3V and 5V I/O design
5V I/O in a mixed 3V and 5V I/O design
10
6mA bistate
bistate
bistate
bistate
12mA
24mA
12mA
tpLH
tpHL
tpLH
tpHL
tpLH
tpHL
tpLH
tpHL
tpLH
tpHL
tpLH
tpHL
0.79
0.82
0.45
0.70
Outputs
Outputs
Inputs
Inputs
68fF
34fF
4.01
3.68
4.14
3.74
4.16
4.72
4.25
4.75
100pF
50pF
100pF
50pF
0.82
0.86
0.48
0.72
5.25
4.33
5.38
4.39
136fF
6.20
5.66
6.29
5.68
68fF
100pF
200pF
100pF
200pF
.
DC ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
Exceeding the absolute maximum ratings may cause per-
manent damage to the device. Extended exposure at the
maximum ratings will affect device reliability.
HBM stands for Human Body Model.
Normal Operating Conditions
Neither performance nor reliability is guaranteed outside
these limits. Extended operation above these limits may
affect device reliability.
Supply voltage
Input voltage
Output voltage
Static discharge voltage (HBM)
Storage temperature
Ceramic
Plastic
Supply voltage
Input voltage
Output voltage
Current per pad
Junction temperature
Ceramic package
Plastic package
Ambient temperature
Commercial grade
Industrial grade
Military grade
Parameter
Parameter
Min.
Min.
-0.5
-0.5
-0.5
V
V
-65
-55
-55
-55
-40
-55
2.7
0
SS
SS
V
V
DD
DD
Max.
Max.
+150
+125
V
V
150
150
100
125
7.0
5.5
70
85
4
DD
DD
+0.5
+0.5
Units
Units
mA
kV
°C
°C
°C
°C
°C
°C
°C
V
V
V
V
V
V