CLA90000 Zarlink Semiconductor, CLA90000 Datasheet - Page 14
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CLA90000
Manufacturer Part Number
CLA90000
Description
High Density CMOS Gate Arrays
Manufacturer
Zarlink Semiconductor
Datasheet
1.CLA90000.pdf
(28 pages)
CELL LIBRARY
I Comprehensive range of microcells
I Extensive SystemBuilder library of complex functions
I Software generated gate array RAM and high
I Phase locked loop cells, both gate array variant and
I Oscillator cells
I 3.3V and 5V PCI/PC Card cells
I JTAG controller (check availability)
A comprehensive cell library is available for the CLA90000
series including cells for specific applications.
The library is being continually expanded, so please check
with your local Zarlink representative for the latest addi-
tions.
Zarlink design kits feature a simple and powerful software
tool called the paracell model generator (PMG) that can
generate both gate array and embedded RAM. The design
route is the same for both RAM types but the cost is differ-
ent because an embedded RAM requires fabrication of all
device layers.
Register File RAM
Gate array RAM is available as either single or dual port
RAM with a minimum size of 8 words x 2 bits and a maxi-
mum of 256 words x 64 bits. Memory speeds and number
of gates uses are summarized in the table below for a typi-
cal single-port RAM operating at 5V, 25°C.
14
24 words x 4 bits
256 words x 8bits
256 words x 64bits
performance embedded RAM and ROM
embedded variant with on-chip filter
Size
Access
Read
(ns)
11.48
12.20
2.60
Cycle
Write
(ns)
11.22
3.21
6.31
gates
53766
9918
696
Size
0.128
1.828
9.910
mm
2
Gate Array ROM
Gate array ROM can be from 8 to 64 kbits with a word
length of from 2 to 64 bits in steps of 1 bit. The table below
shows memory sizes and typical access times for a ROM
operatiing at 5V, 25°C.
Embedded RAM and ROM
Embedded RAM and ROM meet requirements for high
density and high performance. Word length can be from 4
to 64 bits and maximum memory size is 64 kbits for RAM
and 128 kbits for ROM. The table below is for a typical
embedded RAM operating at 5V, 25°C.
The table below is for a typical embedded ROM operating
at 5V, 25°C.
24 words x 4 bits
256 words x 8bits
256 words x 64bits
24 words x 4 bits
256 words x 8 bits
256 words x 64
bits
8192 words x 8
bits
256 words x 8 bits
256 words x 64 bits
4096 words x 16bits
Size
Size
Size
Access
Read
Access
(ns)
3.3
3.4
4.0
4.2
Access
Read
11.3
14.8
(ns)
Read
8.6
(ns)
2.61
3.40
4.24
Cycle
Write
(ns)
3.7
3.9
4.7
5.8
gates
Cycle
Read
11.1
14.9
18.1
(ns)
1440
5472
196
Size
0.04
0.27
1.01
Size (mm
mm
Size (mm
2
0.111
0.423
2.059
5.983
0.215
0.827
1.638
2
)
2
)