CA3127 Intersil, CA3127 Datasheet - Page 2

• Manufacturer Part Number: CA3127
• Description: High Frequency NPN Transistor Array
• Manufacturer: Intersil

Absolute Maximum Ratings
The following ratings apply for each transistor in the device
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -55
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
Electrical Specifications
NOTE:
DC CHARACTERISTICS (For Each Transistor)
Collector-to-Base Breakdown Voltage
Collector-to-Emitter Breakdown Voltage
Collector-to-Substrate Breakdown-Voltage
Emitter-to-Base Breakdown Voltage (Note 3)
Collector-Cutoff-Current
Collector-Cutoff-Current
DC Forward-Current Transfer Ratio
Base-to-Emitter Voltage
Collector-to-Emitter Saturation Voltage
Magnitude of Difference in V
Magnitude of Difference in I
DYNAMIC CHARACTERISTICS
Noise Figure
Gain-Bandwidth Product
Collector-to-Base Capacitance
Collector-to-Substrate Capacitance
Emitter-to-Base Capacitance
Voltage Gain
Power Gain
Noise Figure
Input Resistance
Output Resistance
Input Capacitance
Output Capacitance
Magnitude of Forward Transadmittance
1. The collector of each transistor of the CA3127 is isolated from the substrate by an integral diode. The substrate (Terminal 5) must be con-
2.
3. When used as a zener for reference voltage, the device must not be subjected to more than 0.1mJ of energy from any possible capacitance
Collector-to-Emitter Voltage, V
Collector-to-Base Voltage, V
Collector-to-Substrate Voltage, V
Collector Current, I
nected to the most negative point in the external circuit to maintain isolation between transistors and to provide for normal transistor action.
or electrostatic discharge in order to prevent degradation of the junction. Maximum operating zener current should be less than 10mA.
JA
is measured with the component mounted on an evaluation PC board in free air.
PARAMETER
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA
B
BE
CBO
CEO
. . . . . . . . . . . . . . . . . . . . . . . 20V
CIO
T
A
. . . . . . . . . . . . . . . . . . . . . 15V
= 25
(Note 1). . . . . . . . . . . . . 20V
o
C
I
I
I
I
V
V
V
V
I
Q
V
f = 100kHz, R
V
V
V
V
V
Cascode Configuration
f = 100MHz, V+ = 12V, I
Common-Emitter Configuration
V
o
C
C
C1
E
C
C to 125
CE
CB
CE
CE
CE
CE
CB
CI
BE
CE
CE
1
= 10 A, I
= 1mA, I
= 10 A, I
= 10mA, I
and Q
= 10 A, I
= 6V, f = 1MHz
= 10V I
= 10V, I
= 6V
= 6V
= 6V, I
= 6V, I
= 6V, f = 1MHz
= 4V, f = 1MHz
= 6V, f = 10MHz, R
= 6V, I
CA3127
2
o
TEST CONDITIONS
C
B
Matched
C
C
C
C
E
B
B
5-2
E
B
= 0
= 1mA
= 5mA
= 1mA, f = 200 MHz
= 0
= 0
= 0
S
= 1mA
= 0
= 0, I
= 500 , I
Thermal Information
Thermal Resistance (Typical, Note 2)
Maximum Power Dissipation, P
Maximum Junction Temperature (Die) . . . . . . . . . . . . . . . . . . 175
Maximum Junction Temperature (Plastic Packages). . . . . . . . 150
Maximum Storage Temperature Range . . . . . . . . . -65
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(SOIC - Lead Tips Only)
E
= 0
I
I
I
I
I
I
L
C
C
C
C
C
C
C
C
= 1k , I
= 1mA
= 5mA
= 1mA
= 0.1mA
= 5mA
= 1mA
= 0.1mA
= 1mA
C
= 1mA
0.71
0.66
0.60
MIN
D
20
15
20
35
40
35
27
4
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
(Any One Transistor). . . . . . 85mW
Fig. 5
TYP
0.81
0.76
0.70
0.26
1.15
See
400
5.7
0.5
0.2
2.2
3.5
4.6
3.7
32
24
60
88
90
85
28
30
24
2
-
-
MAX
0.91
0.86
0.80
0.50
0.5
40
5
3
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
o
C to 150
JA
UNITS
175
(
GHz
90
mV
mS
o
nA
dB
dB
dB
dB
k
pF
pF
pF
pF
pF
V
V
V
V
V
V
V
V
C/W)
A
A
o
o
o
o
C
C
C
C