CS493002-CL Cirrus Logic, CS493002-CL Datasheet - Page 16

• Manufacturer Part Number: CS493002-CL
• Description: Multi-Standard Audio Decoder Family
• Manufacturer: Cirrus Logic

1.11. Switching Characteristics — Digital Audio Input
(T
Notes: 1. Master mode timing specifications are characterized, not production tested.
16
SCLKN1(2) period for both Master and Slave mode
SCLKN1(2) duty cycle for Master and Slave mode
Master Mode
LRCLKN1(2) delay after SCLKN1(2) transition
SDATAN1(2) setup to SCLKN1(2) transition
SDATAN1(2) hold time after SCLKN1(2) transition
Slave Mode
Time from active edge of SCLKN1(2) to LRCLKN1(2) transition
Time from LRCLKN1(2) transition to SCLKN1(2) active edge
SDATAN1(2) setup to SCLKN1(2) transition
SDATAN1(2) hold time after SCLKN1(2) transition
A
= 25 °C; VA, VD[3:1] = 2.5 V ±5%; Inputs: Logic 0 = DGND, Logic 1 = VD, C
2. Master mode is defined as the CS493XX driving LRCLKN1(2) and SCLKN1(2). Master or Slave mode
3. This timing parameter is defined from the non-active edge of SCLKN1(2). The active edge of
4. This timing parameter is defined from the active edge of SCLKN1(2). The active edge of SCLKN1(2) is
5. Slave mode is defined as SCLKN1(2) and LRCLKN1(2) being driven by an external source.
can be programmed.
SCLKN1(2) is the point at which the data is valid.
the point at which the data is valid.
Parameter
(Note 1, 2)
(Note 1)
(Note 1)
(Note 3)
(Note 4) T
(Note 4)
(Note 5)
(Note 4)
(Note 4)
Symbol
T
T
T
T
T
sdsum
T
T
sdsus
sdhm
sdhs
sclki
lrds
stlr
lrts
CS49300 Family DSP
L
= 20 pF)
Min
40
45
10
10
10
5
5
5
-
Max
55
10
-
-
-
-
-
-
-
DS339PP4
Unit
ns
ns
ns
ns
ns
ns
ns
ns
%