ST5090 ST Microelectronics, ST5090 Datasheet
ST5090
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ST5090 Summary of contents
Page 1
... The PCM interface supports both non-delayed (nor- mal and reverse) and delayed frame synchroniza- tion modes. ST5090 can be configurated either as a 14-bit lin- ear 8-bit companded PCM coder. Additionally to the CODEC/FILTER function, ST5090 includes a Tone/Ring/DTMF generator, a sidetone generation,and a buzzer driver output ...
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... ST5090 PIN CONNECTIONS (Top view) N. MIC3 MIC3- CCA GNDA CCP N. MIC1 MIC1- Fr MIC2+ Fr+ SO28 MIC2- Lr Lr+ GNDP 9 20 MCLK CCLK 11 18 GND CS ...
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... CS- input is low, depending on the current instruction. CCLK may be asynchronous with the other system clocks. 12 CS- Chip Select input: When this pin is low, control information is written into and out from the ST5090 via CI and CO pins Control data Input: Serial Control information is shifted into the ST5090 on this pin when CS- is low on the rising edges of CCLK ...
Page 4
... Chip Select input: When this pin is low, control information is written into and out from the ST5090 via CI and CO pins Control data Input: Serial Control information is shifted into the ST5090 on this pin when CS- is low on the rising edges of CCLK Pulse width modulated buzzer driver output. ...
Page 5
... Following power-on initialization, power up and power down control may be accomplished by writ- ing any of the control instructions listed in Table 1 into ST5090 with ”P” bit set to 0 for power for power down. Normally recommended that all programma- ble functions be initially programmed while the device is powered down ...
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... Ta- ble 1, with the exception of a single byte power- up/down command. To shift control data into ST5090, CCLK must be pulsed high 8 times while CS- is low. Data on CI input is shifted into the serial input register on the rising edge of each CCLK pulse. After all data is ...
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... Significant Only For Companded Code. propriate programmable register. CS- must return high at the end of the 2nd byte. To read-back status information from ST5090, the first byte of the appropriate instruction is strobed in during the first CS- pulse, as defined in Table 1. CS- must be set low for a further 8 CCLK cy- cles, during which data is shifted out of the CO pin on the falling edges of CCLK ...
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... ST5090 II PROGRAMMABLE FUNCTIONS For both formats of Digital Interface, programma- ble functions are configured by writing to a num- ber of registers using a 2-byte write cycle. Most of these registers can also be read-back for Table 1: Programmable Register Intructions Function Single byte Power up/down Write CR0 Read-back CR0 ...
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... L0 latch set connected to rec. path R CR2 connected to rec. path Trans path connected CR3 connected voice data transfer disable voice data transfer enable 0 B1 channel selected 1 B2 channel selected 0 3.3V power supply 1 5.0V power supply ST5090 * * Companded Code * * (1) (1) * (1) ( (1) * (1) * ...
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... ST5090 Table 4: Control Register CR2 Functions msb (1) Significant in companded mode only. Table 5: Control Registers CR3 Functions msb (1) Significant in companded mode only Table 6: Control Register CR4 Functions ...
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... Squarewave signal selected 1 Sinewave signal selected 0 Normal operation 1 Tone / Ring Generator connected to Transmit path while f2=0 ST5090 * * * * ...1.6(2) 1.26(2) 0.066 0.053 * * * 11/29 ...
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... ST5090 Table 10: Control Register CR8 Functions f17 f16 f15 f14 f13 f12 msb Table 11: Control Register CR9 Functions f27 f26 f25 f24 f23 f22 msb Table 12: Control Register CR10 Functions DFT HFT ...
Page 13
... Vin = - full scale MSB is always the first PCM bit shifted in or out of: ST5090. Digital loopback Digital loopback mode is entered by setting DL bit(0) equal 1. In Digital Loopback mode, data written into Re- ceive PCM Data Register from the selected re- ceived time-slot is read-back from that Register in ...
Page 14
... B-channel selection (1) Bit TS(1) permits selection between channels. Default value is B1 channel. Supply Voltage selection Bit SV (0) permits selection of the power supply of the ST5090. Default value is 3.3V. CONTROL REGISTER CR2 (1) Data sent to receive path or data received from D input. Refer to bit MR(4) in ”Control Register R CR1” ...
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... Bit BI (6) allows to chose the logic level at which the duty cycle is referred means that duty cycle is intended as the relative width of the logic1, while means that duty cycle is intended as the relative width of the logic 0. When (or during power down ST5090 15/29 ...
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... ST5090 Table 12: Examples of Usual Frequency Selection (Standard frequency tone range) Description f1 value (decimal) Tone 250 Hz 32 Tone 330 Hz 42 Tone 425 Hz 54 Tone 440 Hz 56 Tone 800 Hz 102 Tone 1330 Hz 170 DTMF 697 DTMF 770 Hz DTMF 852 Hz 109 DTMF 941 Hz ...
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... TIMING DIAGRAM Non Delayed Data Timing Mode (Normal) (*) Delayed Data Timing Mode (*) (*) In the case of companded code the timing is applied to 8 bits instead of 16 bits (see ST5080A data sheet) ST5090 17/29 ...
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... ST5090 TIMING DIAGRAM (continued) Non Delayed Reverse Data Timing Mode (*) tHMFR 1 2 MCLK tSFMR tHMFR FS tDFD tDMDR (*) In the case of companded code the timing is applied to 8 bits instead of 16 bits. Serial Control Timing (MICROWIRE MODE) 18/29 tRM tFM tWMM ...
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... IL IL Measured from Measured from Test Condition Load = 100 pf Applies only if FS rises later than MCLK rising edge in Non Delayed Mode only R R ST5090 Value Unit GND - 100 GND - 150 C ...
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... ST5090 SERIAL CONTROL PORT TIMING Symbol Parameter f Frequency of CCLK CCLK t Period of CCLK high WCH t Period of CCLK low WCL t Rise Time of CCLK RC t Fall Time of CCLK FC t Hold Time, CCLK high to CS– low HCS t Setup Time, CS– low to CCLK high SSC ...
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... not Lr+ Lr- Fr+ Fr- loaded (unless otherwise specified 3. 3.3V Test Condition Min. Transmit Amps connected for 20dB gain Transmit Amps connected for 42.5dB gain ST5090 Typ. Max. Unit +100 1.0 +100 +100 mV Typ. Max. ...
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... ST5090 TRANSMISSION CHARACTERISTICS (continued) AMPLITUDE RESPONSE (Maximum, Nominal, and Minimum Levels) Receive path - Absolute levels Parameter 0 dBM0 level 0 dBM0 level AMPLITUDE RESPONSE (Maximum, Nominal, and Minimum Levels) Receive path - Absolute levels Parameter 0 dBM0 level 0 dBM0 level AMPLITUDE RESPONSE Transmit path ...
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... -50 dBm0 to -40 dBm0 -0 -55 dBm0 to -50 dBm0 -1.2 R Sinusoidal Test Method Reference Level = –10 dBm0 D = -40 dBm0 to -3 dBm0 -0 -50 dBm0 to -40 dBm0 -0 -55 dBm0 to -50 dBm0 -1.2 R ST5090 Typ. Max. Unit 0.5 dB 0.5 dB 0.5 dB 0.5 dB 0.1 dB 0.1 dB - 0 ...
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... ST5090 ENVELOPE DELAY DISTORTION WITH FREQUENCY Symbol Parameter DXA Tx Delay, Absolute DXR Tx Delay, Relative DRA Rx Delay, Absolute DRR Rx Delay, Relative NOISE Symbol Parameter NXP Tx Noise, P weighted (up to 35dB) NRP Rx Noise, A weighted (max. gain) NRS Noise, Single Frequency PPSRx PSRR, Tx PPSRp PSRR, Rx ...
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... Loop-around measurement Voltage at MIC = -10 dBm0 to -27 dBm0, 2 Frequencies in the range 300 - 3400 Hz Test Condition Min. Transmit Level = 0 dBm0 300 - 3400 Quiet PCM Code Receive Level = -6 dBm0 300 - 3400 Hz MIC = 0V ST5090 Typ. Max. Unit ...
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... VLr- R must be greater than 30 For higher capacitive transducers, lower R values can be used. POWER SUPPLIES While pins of ST5090 device are well protected against electrical misuse recommended that the standard CMOS practise of applying GND be- fore any other connections are made should al- ways be followed ...
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... MAX. MIN. 1.60 0.15 0.002 1.45 0.053 0.45 0.012 0.20 0.004 0.75 0.018 (min.), 3.5 (typ.), 7 (max ST5090 inch TYP. MAX. 0.063 0.006 0.055 0.057 0.014 0.018 0.008 0.472 0.394 0.315 0.031 0.472 0.394 0.315 0.024 0.030 0.039 0.10mm .004 Seating Plane ...
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... ST5090 SO28 PACKAGE AND MECHANICAL DATA DIM. MIN. TYP 0.1 b 0. 16.51 F 7.4 L 0.4 S 28/29 mm MAX. MIN. 2.65 0.3 0.004 0.49 0.014 0.32 0.009 0.5 45 (typ.) 18.1 0.697 10.65 0.394 1.27 7.6 0.291 1.27 0.016 8 (max.) inch TYP. MAX. 0.104 0.012 0.019 0.013 0.020 0.713 0.419 0.050 0.65 0.299 0.050 ...
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... SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without ex- press written approval of SGS-THOMSON Microelectronics. 1996 SGS-THOMSON Microelectronics All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - Canada - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thaliand - United Kingdom - U.S.A. ST5090 29/29 ...