ST5090 ST Microelectronics, ST5090 Datasheet - Page 15

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ST5090

Manufacturer Part Number
ST5090
Description
LOW VOLTAGE 14-BIT LINEAR CODEC WITH HIGH-PERFORMANCE AUDIO FRONT-END
Manufacturer
ST Microelectronics
Datasheet

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Tone/Ring amplifier gain selection
Output level of Ring/Tone generator, before at-
tenuation by programmable attenuator is 1.6 Vpk-
pk when f1 generator is selected alone or
summed with the f2 generator and 1.26 Vpk-pk
when f2 generator is selected alone.
Selected output level can be attenuated down to
-27 dB by programmable attenutator by setting
bits 4 to 7.
Frequency mode selection
Bits ’F1’ (3) and ’F2’ (2) permit selection of f1
and/or f2 frequency generator according to TA-
BLE 9.
When f1 (or f2) is selected, output of the
Ring/Tone is a squarewave (or a sinewave) signal
at the frequency selected in the CR8 (or CR9)
Register.
When f1 and f2 are selected in summed mode,
output of the Ring/Tone generator is a signal
where f1 and f2 frequency are summed.
In order to meet DTMF specifications, f2 output
level is attenuated by 2dB relative to the f1 output
level.
Frequency temporization must be controlled by the
microcontroller.
Waveform selection
Bit ’SN’ (1) selects waveform of the output of the
Ring/Tone generator. Sinewave or squarewave
signal can be selected.
DTMF selection
Bit DE (0) permits connection of Ring/Tone/DTMF
generator on the Transmit Data path instead of
the Transmit Amplifier output. Earpiece or extra
receive output feed-back may be provided by
sidetone circuitry by setting bit SI or directly by
setting bit RTE in Register CR4. Loudspeaker
feed-back may be provided directly by setting bit
RTL in Register CR4.
CONTROL REGISTERS CR8 AND CR9
First byte of a READ or a WRITE instruction to
Control Register CR8 or CR9 is as shown in TA-
BLE 1. Second byte is respectively as shown in
TABLE 10 and 11.
If ”standard frequency tone range” is selected,
Tone or Ring signal frequency value is defined by
the formula:
and
where CR8 and CR9 are decimal equivalents of
the binary values of the CR8 and CR9 registers
f1 = CR8 / 0.128 Hz
f2 = CR9 / 0.128 Hz
respectively. Thus, any frequency between 7.8 Hz
and 1992 Hz may be selected in 7.8 Hz step.
If ”halved frequency tone range”is selected, Tone
or Ring signal frequency value is defined by the
formula:
and
This any frequency between 3.9Hz and 996Hz
may be selected in 3.9Hz step.
If ”doubled frequency tone range”is selected,
Tone or Ring signal frequency value is defined by
the formula:
and
Thus any frequency between 15.6Hz and 3984Hz
may be selected in 15.6Hz step.
TABLE 12 gives examples for the main frequen-
cies usual for Tone or Ring generation.
CONTROL REGISTER CR10
Bit DFT(1) and HFT(0) permits the selection
among ”standard frequency tone range” (i.e. from
7.8Hz to 1992Hz in 7.8Hz step), ”halved fre-
quency tone range” (i.e. from 3.9Hz to 996Hz in
3.9Hz step), and ”doubled frequency tone range”
(i.e. from 15.6Hz to 3984Hz in 15.6Hz step) ac-
cording to the values described in CONTROL
REGISTER CR8 and CR9.
CONTROL REGISTER CR11
Bit BE(7) permits connection of a f1 squarewave
PWM Ring signal, amplitude modulated or not by
a f2 squarewave signal, to buzzer driver output
BZ. Bits BZ5 to BZ0 define the duty cycle of the
PWM squarewave, according to the following for-
mula:
where CR11(5
the binary value BZ5 BZ0.
When BE = 1, if bits F1 = 1 and F2 = 0 in regis-
ter CR7, a f1 PWM ring signal is present at the
buzzer output, while if bits F1 = 1 and F2 = 1 in
register CR7 the f1 PWM ring signal is also am-
plitude modulated by a f2 squarewave fre-
quency. Bit BI (6) allows to chose the logic level
at which the duty cycle is referred: BI = 0 means
that duty cycle is intended as the relative width
of the logic1, while BI = 1 means that duty cycle
is intended as the relative width of the logic 0.
When BE = 0 (or during power down) BZ = 0 if
BI = 0 or BZ = 1 if BI = 1.
f1 = CR8 / 0.256 Hz
f2 = CR9 / 0.256 Hz
f1 = CR8 / 0.064 Hz
f2 = CR9 / 0.064 Hz
Duty Cycle = CR11(5 0) x 0.78125%
0) is the decimal equivalent of
ST5090
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