TS80C51RA2 Atmel Corporation, TS80C51RA2 Datasheet - Page 11

• Manufacturer Part Number: TS80C51RA2
• Description: High Performance 8-bit Microcontroller
• Manufacturer: Atmel Corporation

TS80C51Rx2 Enhanced
Features
X2 Feature
Description
4188A–8051–10/02
In comparison to the original 80C52, the TS8xC51Rx2 implements some new features,
which are
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The TS80C51Rx2 core needs only 6 clock periods per machine cycle. This feature
called ”X2” provides the following advantages:
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In order to keep the original C51 compatibility, a divider by 2 is inserted between the
XTAL1 signal and the main clock input of the core (phase generator). This divider may
be disabled by software.
The clock for the whole circuit and peripheral is first divided by two before being used by
the CPU core and peripherals. This allows any cyclic ratio to be accepted on XTAL1
input. In X2 mode, as this divider is bypassed, the signals on XTAL1 must have a cyclic
ratio between 40 to 60%. Figure 1 shows the clock generation block diagram. X2 bit is
validated on XTAL1÷2 rising edge to avoid glitches when switching from X2 to STD
mode. Figure 2 shows the mode switching waveforms.
Figure 1. Clock Generation Diagram
XTAL1
The X2 option.
The Dual Data Pointer.
The extended RAM.
The Programmable Counter Array (PCA).
The Watchdog.
The 4 level interrupt priority system.
The power-off flag.
The ONCE mode.
The ALE disabling.
Some enhanced features are also located in the UART and the timer 2.
Divides frequency crystals by 2 (cheaper crystals) while keeping same CPU power.
Saves power consumption while keeping same CPU power (oscillator power
saving).
Saves power consumption by dividing dynamically operating frequency by 2 in
operating and idle modes.
Increases CPU power by 2 while keeping same crystal frequency.
F
:
XTAL
2
XTAL1:2
CKCON reg
X2
0
1
F
OSC
CPU control
state machine: 6 clock cycles.
TS8xC51Rx2
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