LTC3858-1 Linear Technology Corporation, LTC3858-1 Datasheet - Page 13

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LTC3858-1

Manufacturer Part Number
LTC3858-1
Description
Dual 2-Phase Synchronous Step-Down Controller
Manufacturer
Linear Technology Corporation
Datasheet
www.DataSheet4U.com
OPERATION
operation is maintained down to approximately 1% of
designed maximum output current. At very light loads, the
current comparator, ICMP , may remain tripped for several
cycles and force the external top MOSFET to stay off for
the same number of cycles (i.e., skipping pulses). The
inductor current is not allowed to reverse (discontinuous
operation). This mode, like forced continuous operation,
exhibits low output ripple as well as low audio noise and
reduced RF interference when compared to Burst Mode
operation. It provides higher light load effi ciency than
forced continuous mode, but not nearly as high as Burst
Mode operation.
Frequency Selection and Phase-Locked Loop
(FREQ and PLLIN/MODE Pins)
The selection of switching frequency is a tradeoff between
effi ciency and component size. Low frequency opera-
tion increases effi ciency by reducing MOSFET switching
losses, but requires larger inductance and/or capacitance
to maintain low output ripple voltage.
The switching frequency of the LTC3858-1’s controllers
can be selected using the FREQ pin.
If the PLLIN/MODE pin is not being driven by an external
clock source, the FREQ pin can be tied to SGND, tied to
INTV
FREQ to SGND selects 350kHz while tying FREQ to INTV
selects 535kHz. Placing a resistor between FREQ and
SGND allows the frequency to be programmed between
50kHz and 900kHz.
A phase-locked loop (PLL) is available on the LTC3858-1
to synchronize the internal oscillator to an external clock
source that is connected to the PLLIN/MODE pin. The
phase detector adjusts the voltage (through an internal
lowpass fi lter) of the VCO input to align the turn-on of
controller 1’s external top MOSFET to the rising edge of
the synchronizing signal. Thus, the turn-on of controller
2’s external top MOSFET is 180 degrees out of phase to
the rising edge of the external clock source.
For rapid frequency lock-in, the VCO input voltage can be
pre-biased to the desired operating frequency before the
external clock is applied. A resistor connected between
CC
or programmed through an external resistor. Tying
(Refer to the Functional Diagram)
CC
the FREQ pin and SGND can pre-bias VCO’s input voltage
to the desired frequency. Once pre-biased, the PLL loop
only needs to make slight changes to the VCO input in
order to synchronize the rising edge of the external clock’s
to the rising edge of TG1. The ability to pre-bias the loop
fi lter allows the PLL to lock-in rapidly without deviating
far from the desired frequency.
The typical capture range of the phase-locked loop is
from approximately 50kHz to 900kHz, with a guarantee
over all manufacturing variations to be between 75kHz
and 850kHz.
The typical input clock thresholds on the PLLIN/MODE
pin are 1.6V (rising) and 1.1V (falling).
Output Overvoltage Protection
An overvoltage comparator guards against transient over-
shoots as well as other more serious conditions that may
overvoltage the output. When the V
than 10% above its regulation point of 0.800V, the top
MOSFET is turned off and the bottom MOSFET is turned
on until the overvoltage condition is cleared.
Power Good (PGOOD) Pin
The PGOOD1 pin is connected to an open drain of an
internal N-channel MOSFET. The MOSFET turns on and
pulls the PGOOD1 pin low when the corresponding V
voltage is not within ±10% of the 0.8V reference voltage.
The PGOOD1 pin is also pulled low when the RUN1 pin
is low (shut down). When the V
the ±10% requirement, the MOSFET is turned off and the
pin is allowed to be pulled up by an external resistor to a
source no greater than 6V.
Theory and Benefi ts of 2-Phase Operation
Why the need for 2-phase operation? Up until the
2-phase family, constant frequency dual switching regula-
tors operated both channels in phase (i.e., single phase
operation). This means that both switches turned on at
the same time, causing current pulses of up to twice the
amplitude of those for one regulator to be drawn from the
input capacitor and battery. These large amplitude current
FB1
LTC3858-1
FB
pin voltage is within
pin rises by more
13
FB1
38581f
pin

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