LTC3858-1 Linear Technology Corporation, LTC3858-1 Datasheet - Page 26

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LTC3858-1

Manufacturer Part Number
LTC3858-1
Description
Dual 2-Phase Synchronous Step-Down Controller
Manufacturer
Linear Technology Corporation
Datasheet
www.DataSheet4U.com
LTC3858-1
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the IC. These items are also illustrated graphically in the
layout diagram of Figure 10. Figure 11 illustrates the current
waveforms present in the various branches of the 2-phase
synchronous regulators operating in the continuous mode.
Check the following in your layout:
1. Are the top N-channel MOSFETs MTOP1 and MTOP2
2. Are the signal and power grounds kept separate? The
3. Do the LTC3858-1 V
4. Are the SENSE
5. Is the INTV
APPLICATIONS INFORMATION
26
located within 1cm of each other with a common drain
connection at C
decoupling for the two channels as it can cause a large
resonant loop.
combined IC signal ground pin and the ground return
of C
minals. The path formed by the top N-channel MOSFET,
Schottky diode and the C
leads and PC trace lengths. The output capacitor (–)
terminals should be connected as close as possible
to the (–) terminals of the input capacitor by placing
the capacitors next to each other and away from the
Schottky loop described above.
to the (+) terminals of C
must be connected between the (+) terminal of C
and signal ground. The feedback resistor connections
should not be along the high current input feeds from
the input capacitor(s).
minimum PC trace spacing? The fi lter capacitor between
SENSE
to the IC. Ensure accurate current sensing with Kelvin
connections at the SENSE resistor.
to the IC, between the INTV
pins? This capacitor carries the MOSFET drivers’ cur-
rent peaks. An additional 1μF ceramic capacitor placed
immediately next to the INTV
improve noise performance substantially.
INTVCC
+
and SENSE
must return to the combined C
CC
decoupling capacitor connected close
and SENSE
IN
? Do not attempt to split the input
FB
should be as close as possible
pins’ resistive dividers connect
IN
capacitor should have short
OUT
+
CC
leads routed together with
CC
? The resistive divider
and PGND pins can help
and the power ground
OUT
(–) ter-
OUT
6. Keep the switching nodes (SW1, SW2), top gate nodes
7. Use a modifi ed “star ground” technique: a low imped-
PC Board Layout Debugging
Start with one controller on at a time. It is helpful to use
a DC-50MHz current probe to monitor the current in the
inductor while testing the circuit. Monitor the output
switching node (SW pin) to synchronize the oscilloscope
to the internal oscillator and probe the actual output voltage
as well. Check for proper performance over the operating
voltage and current range expected in the application. The
frequency of operation should be maintained over the input
voltage range down to dropout and until the output load
drops below the low current operation threshold—typi-
cally 10% of the maximum designed current level in Burst
Mode operation.
The duty cycle percentage should be maintained from cycle
to cycle in a well-designed, low noise PCB implementation.
Variation in the duty cycle at a subharmonic rate can sug-
gest noise pickup at the current or voltage sensing inputs
or inadequate loop compensation. Overcompensation of
the loop can be used to tame a poor PC layout if regula-
tor bandwidth optimization is not required. Only after
each controller is checked for its individual performance
should both controllers be turned on at the same time.
A particularly diffi cult region of operation is when one
controller channel is nearing its current comparator trip
point when the other channel is turning on its top MOSFET.
This occurs around 50% duty cycle on either channel due
(TG1, TG2), and boost nodes (BOOST1, BOOST2) away
from sensitive small-signal nodes, especially from the
opposites channel’s voltage and current sensing feed-
back pins. All of these nodes have very large and fast
moving signals and therefore should be kept on the
“output side” of the LTC3858-1 and occupy minimum
PC trace area.
ance, large copper area central grounding point on
the same side of the PC board as the input and output
capacitors with tie-ins for the bottom of the INTV
decoupling capacitor, the bottom of the voltage feedback
resistive divider and the SGND pin of the IC.
38581f
CC

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