NT256D64S88B1G Nanya Technology, NT256D64S88B1G Datasheet - Page 18
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NT256D64S88B1G
Manufacturer Part Number
NT256D64S88B1G
Description
(NT256D64S88Bxx) 256MB DDR DIMM
Manufacturer
Nanya Technology
Datasheet
1.NT256D64S88B1G.pdf
(28 pages)
1. IDD specifications are tested after the device is properly initialized.
2. Input slew rate = 1V/ ns.
3. Current at 7.8 µs is time averaged value of IDD5 at t
All IDD current values are calculated from device level.
Symbol
IDD4W
IDD2P Precharge Power-Down Standby Current: all banks idle; power-down mode; CKE
IDD2N
IDD3P Active Power-Down Standby Current: one bank active; power-down mode; CKE
IDD3N
IDD4R
IDD0
IDD1
IDD5
IDD6
IDD7
NT512D64S8HB1G / NT512D64S8HB1GY / NT512D64S8HB0G
NT256D64S88B1G / NT256D64S88B1GY NT256D64S88B0G
NT128D64SH4B1G / NT512D72S8PB0G (ECC) / NT256D72S89B0G (ECC)
Unbuffered DDR DIMM
Operating, Standby, and Refresh Currents
T
REV 2.2
Aug 3, 2004
Preliminary
A
= 0 °C ~ 70 °C; V
Operating Current: one bank; active/precharge; t
clock cycle; address and control inputs changing once per clock cycle
Operating Current: one bank; active/read/precharge; Burst = 2; t
control inputs changing once per clock cycle
Idle Standby Current: CS
per clock cycle
Active Standby Current: one bank; active/precharge; CS V
DQS inputs changing twice per clock cycle; address and control inputs changing once per clock cycle
Operating Current: one bank; Burst = 2; reads; continuous burst; address and control inputs changing once per clock cycle;
DQ and DQS outputs changing twice per clock cycle; CL = 2.5; t
Operating Current: one bank; Burst = 2; writes; continuous burst; address and control inputs changing once per clock cycle;
DQ and DQS inputs changing twice per clock cycle; CL=2.5; t
Auto-Refresh Current: t
Self-Refresh Current: CKE
Operating Current: four bank; four bank interleaving with BL = 4, address and control inputs randomly changing; 50% of
data changing at every transfer; t
DDQ
= V
DD
= 2.5V ± 0.2V (PC2100/PC2700); V
RC
= t
V
RFC (MIN)
IH (MIN)
0.2V
RC
; all banks idle; CKE
= t
RC (min)
; I
RFC (MIN)
OUT
RC
= 0mA.
Parameter/Condition
= t
and IDD2P over 7.8 µs.
RC (MIN)
V
DDQ
IH (MIN)
IH (MIN)
; t
18
CK
CK
= V
RC
; t
= t
= t
CK
; CKE V
DD
CK
= t
CK (MIN)
= t
CK (MIN)
= 2.6V ± 0.1V (PC3200)
RC (MIN)
= t
CK (MIN)
CK (MIN)
; DQ, DM, and DQS inputs changing twice per
; CL=2.5; t
IH (MIN)
; I
; address and control inputs changing once
OUT
NANYA reserves the right to change products and specifications without notice.
; t
= 0mA
RC
V
V
IL (MAX)
= t
CK
IL (MAX)
RAS (MAX)
= t
; t
CK (MIN)
; t
CK
CK
= t
; t
= t
; I
CK
CK (MIN)
OUT
CK (MIN)
= t
© NANYA TECHNOLOGY CORPORATION
= 0mA; address and
CK (MIN)
; DQ, DM, and
Notes
1,2,3
1,2
1,2
1,2
1,2
1,2
1,2
1,2
1,2
1,2
1,2