SC16C752BIBS Philips Semiconductors, SC16C752BIBS Datasheet - Page 14

• Manufacturer Part Number: SC16C752BIBS
• Description: 5 V/ 3.3 V and 2.5 V dual UART/ 5 Mbit/s (max.)/ with 64-byte FIFOs
• Manufacturer: Philips Semiconductors

Philips Semiconductors
9397 750 14443
Product data
6.5.1 Interrupt mode operation
6.5.2 Polled mode operation
In interrupt mode (if any bit of IER[3:0] is 1) the processor is informed of the status of
the receiver and transmitter by an interrupt signal, INT. Therefore, it is not necessary
to continuously poll the line status register (LSR) to see if any interrupt needs to be
serviced.
In polled mode (IER[3:0] = 0000) the status of the receiver and transmitter can be
checked by polling the line status register (LSR). This mode is an alternative to the
FIFO interrupt mode of operation where the status of the receiver and transmitter is
automatically known by means of interrupts sent to the CPU.
polled mode operation.
Fig 8. Interrupt mode operation.
Fig 9. FIFO polled mode operation.
Figure 8
PROCESSOR
PROCESSOR
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs
Rev. 03 — 14 December 2004
shows interrupt mode operation.
IOW / IOR
IOW / IOR
INT
THR
THR
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
IIR
LSR
IER
IER
SC16C752B
1
0
Figure 9
1
0
RHR
RHR
002aaa230
002aaa231
1
0
1
0
shows FIFO
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