SC16C752BIBS Philips Semiconductors, SC16C752BIBS Datasheet - Page 8

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SC16C752BIBS

Manufacturer Part Number
SC16C752BIBS
Description
5 V/ 3.3 V and 2.5 V dual UART/ 5 Mbit/s (max.)/ with 64-byte FIFOs
Manufacturer
Philips Semiconductors
Datasheet

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Philips Semiconductors
9397 750 14443
Product data
Fig 4. Autoflow control (Auto-RTS and Auto-CTS) example.
Fig 5. RTS functional timing.
D7 to D0
(1) N = receiver FIFO trigger level.
(2) The two blocks in dashed lines cover the case where an additional byte is sent, as described in
RTS
IOR
RX
6.2.1 Auto-RTS
Start
FIFO
FIFO
TX
RX
Auto-RTS data flow control originates in the receiver block (see
diagram.” on page
trigger levels used in Auto-RTS are stored in the TCR. RTS is active if the RX FIFO
level is below the halt trigger level in TCR[3:0]. When the receiver FIFO halt trigger
level is reached, RTS is deasserted. The sending device (e.g., another UART) may
send an additional byte after the trigger level is reached (assuming the sending UART
has another byte to send) because it may not recognize the deassertion of RTS until
it has begun sending the additional byte. RTS is automatically reasserted once the
receiver FIFO reaches the resume trigger level programmed via TCR[7:4]. This
reassertion allows the sending device to resume transmission.
byte N
UART 1
SERIAL TO
TO SERIAL
PARALLEL
PARALLEL
CONTROL
CONTROL
FLOW
FLOW
Stop
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs
Rev. 03 — 14 December 2004
3).
RTS
CTS
Start
RX
TX
Figure 5
byte N
1
shows RTS functional timing. The receiver FIFO
1
TX
CTS
RX
RTS
2
Stop
SERIAL TO
TO SERIAL
PARALLEL
PARALLEL
CONTROL
CONTROL
FLOW
FLOW
UART 2
N
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Section
FIFO
FIFO
SC16C752B
RX
TX
N+1
Figure 1 “Block
6.2.1.
002aaa228
002aaa226
Start
D7 to D0
8 of 47

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