SC16C752BIBS Philips Semiconductors, SC16C752BIBS Datasheet - Page 6

• Manufacturer Part Number: SC16C752BIBS
• Description: 5 V/ 3.3 V and 2.5 V dual UART/ 5 Mbit/s (max.)/ with 64-byte FIFOs
• Manufacturer: Philips Semiconductors

Philips Semiconductors
Table 2:
9397 750 14443
Product data
Symbol
OPA, OPB
RESET
RIA, RIB
RTSA,
RTSB
RXA, RXB
RXRDYA,
RXRDYB
TXA, TXB
TXRDYA,
TXRDYB
V
XTAL1
XTAL2
CC
Pin description
Pin
LQFP48 HVQFN32
32, 9
36
41, 21
33, 22
5, 4
31, 18
7, 8
43, 6
42
13
14
22, 7
24
-
23, 15
4, 3
-
5, 6
-
26
10
11
…continued
Type
O
I
I
O
I
O
O
O
I
I
O
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs
Description
User defined outputs. This function is associated with individual channels A
and B. The state of these pins is defined by the user through the software
settings of MCR[3]. INTA-INTB are set to active mode and OPA-OPB to a
logic 0 when MCR[3] is set to a logic 1. INTA-INTB are set to the 3-State
mode and OPA-OPB to a logic 1 when MCR[3] is set to a logic 0. The output
of these two pins is HIGH after reset.
Reset. This pin will reset the internal registers and all the outputs. The UART
transmitter output and the receiver input will be disabled during reset time.
RESET is an active-HIGH input.
Ring Indicator (Active-LOW). These inputs are associated with individual
UART channels, A and B. A logic 0 on these pins indicates the modem has
received a ringing signal from the telephone line. A LOW-to-HIGH transition
on these input pins generates a modem status interrupt, if enabled. The state
of these inputs is reflected in the modem status register (MSR).
Request to Send (Active-LOW). These outputs are associated with
individual UART channels, A and B. A logic 0 on the RTS pin indicates the
transmitter has data ready and waiting to send. Writing a logic 1 in the
modem control register MCR[1] will set this pin to a logic 0, indicating data is
available. After a reset these pins are set to a logic 1. These pins only affect
the transmit and receive operations when Auto-RTS function is enabled via
the Enhanced Feature Register (EFR[6]) for hardware flow control operation.
Receive data input. These inputs are associated with individual serial
channel data to the SC16C752B. During the local loop-back mode, these RX
input pins are disabled and TX data is connected to the UART RX input
internally.
Receive Ready (Active-LOW). RXRDYA or RXRDYB goes LOW when the
trigger level has been reached or the FIFO has at least one character. It goes
HIGH when the RX FIFO is empty.
Transmit data A, B. These outputs are associated with individual serial
transmit channel data from the SC16C752B. During the local loop-back
mode, the TX output pin is disabled and TX data is internally connected to
the UART RX input.
Transmit Ready (Active-LOW). TXRDYA or TXRDYB go LOW when there
are at least a trigger level number of spaces available or when the FIFO is
empty. It goes HIGH when the FIFO is full or not empty.
Power supply input.
Crystal or external clock input. Functions as a crystal input or as an
external clock input. A crystal can be connected between XTAL1 and XTAL2
to form an internal oscillator circuit (see
clock can be connected to this pin to provide custom data rates.
Output of the crystal oscillator or buffered clock. (See also XTAL1.)
XTAL2 is used as a crystal oscillator output or a buffered clock output.
Rev. 03 — 14 December 2004
Figure
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
13). Alternatively, an external
SC16C752B
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