SC16IS762 Philips Semiconductors, SC16IS762 Datasheet - Page 6

• Manufacturer Part Number: SC16IS762
• Description: (SC16IS752 / SC16IS762) Dual UART
• Manufacturer: Philips Semiconductors

NXP Semiconductors
Table 2.
SC16IS752_SC16IS762_6
Product data sheet
Symbol
CS/A0
CTSA
CTSB
I2C/SPI
IRQ
SI/A1
SO
SCL/SCLK
SDA
GPIO0/DSRB
GPIO1/DTRB
GPIO2/CDB
GPIO3/RIB
GPIO4/DSRA
GPIO5/DTRA
GPIO6/CDA
GPIO7/RIA
Pin description
Pin
TSSOP28
10
2
16
9
15
11
12
13
14
18
19
20
21
25
26
27
28
6.2 Pin description
HVQFN32
7
31
15
6
14
8
9
10
11
17
18
19
20
24
25
26
27
Type Description
I
I
I
I
O
I
O
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Rev. 06 — 19 December 2006
Dual UART with I
SPI chip select or I
is selected by I2C/SPI pin, this pin is the SPI chip select pin
(Schmitt-trigger active LOW). If I
I2C/SPI pin, this pin along with A1 pin allows user to change the device’s
base address.
To select the device address, please refer to
UART clear to send (active LOW), channel A. A logic 0 (LOW) on the
CTSA pin indicates the modem or data set is ready to accept transmit
data from the SC16IS752/SC16IS762. Status can be tested by reading
MSR[4]. This pin only affects the transmit and receive operations when
Auto-CTS function is enabled via the Enhanced Features Register
EFR[7] for hardware flow control operation.
UART clear to send (active LOW), channel B. A logic 0 on the CTSB pin
indicates the modem or data set is ready to accept transmit data from the
SC16IS752/SC16IS762. Status can be tested by reading MSR[4]. This
pin only affects the transmit and receive operations when Auto-CTS
function is enabled via the Enhanced Features Register EFR[7] for
hardware flow control operation.
I
at logic HIGH. SPI interface is selected if this pin is at logic LOW.
Interrupt (open-drain, active LOW). Interrupt is enabled when interrupt
sources are enabled in the Interrupt Enable Register (IER). Interrupt
conditions include: change of state of the input pins, receiver errors,
available receiver buffer data, available transmit buffer space, or when a
modem status flag is detected. An external resistor (1 k for 3.3 V,
1.5 k for 2.5 V) must be connected between this pin and V
SPI data input pin or I
configuration is selected by I2C/SPI pin, this is the SPI data input pin. If
I
A0 pin allows user to change the slave base address. To select the
device address, please refer to
SPI data output pin. If SPI configuration is selected by I2C/SPI pin, this is
a 3-stateable output pin. If I
I2C/SPI pin, this pin is undefined and must be left as not connected.
I
I
by I2C/SPI pin. If SPI configuration is selected, this is not used and must
be connected to V
Programmable I/O pin or modem DSRB
Programmable I/O pin or modem DTRB
Programmable I/O pin or modem CDB
Programmable I/O pin or modem RIB
Programmable I/O pin or modem DSRA
Programmable I/O pin or modem DTRA
Programmable I/O pin or modem CDA
Programmable I/O pin or modem RIA
2
2
2
2
C-bus or SPI interface select. I
C-bus configuration is selected by I2C/SPI pin, this pin along with the
C-bus or SPI input clock.
C-bus data input/output, open-drain if I
SS
2
C-bus device address select A0. If SPI configuration
2
.
SC16IS752/SC16IS762
C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
2
C-bus device address select A1. If SPI
2
C-bus configuration is selected by the
Table
2
2
C-bus interface is selected if this pin is
C-bus configuration is selected by
[1]
[2]
32.
[2]
[1]
[1]
[2]
[1]
[2]
2
C-bus configuration is selected
Table
32.
© NXP B.V. 2006. All rights reserved.
DD
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