MBM29SL800BD Fujitsu Media Devices, MBM29SL800BD Datasheet - Page 15

• Manufacturer Part Number: MBM29SL800BD
• Description: (MBM29SL800TD/BD) FLASH MEMORY CMOS 8 M (1 M X 8/512 K X 16) BIT
• Manufacturer: Fujitsu Media Devices

Write
Sector Protection
Temporary Sector Unprotection
RESET
Hardware Reset
All identifiers for manufactures and device will exhibit odd parity with DQ
read the proper device codes when executing the autoselect, A
Sector Protection Verify Autoselect Codes Table and Extended Autoselect Code Table in
ERATION”.)
Device erasure and programming are accomplished via the command register. The contents of the register serve
as inputs to the internal state machine. The state machine outputs dictate the function of the device.
The command register itself does not occupy any addressable memory location. The register is a latch used to
store the commands, along with the address and data information needed to execute the command. The com-
mand register is written by bringing WE to V
falling edge of WE or CE, whichever happens later; while data is latched on the rising edge of WE or CE,
whichever happens first. Standard microprocessor write timings are used.
Refer to AC Write Characteristics and the Erase/Programming Waveforms for specific timing parameters.
The MBM29SL800TD/BD feature hardware sector protection. This feature will disable both program and erase
operations in any number of sectors (0 through 18) . The sector protection feature is enabled using programming
equipment at the user’s site. The devices are shipped with all sectors unprotected.
To activate this mode, the programming equipment must force V
CE
be protected. “Sector Address Tables (MBM29SL800TD/BD)” in
TURE define the sector address for each of the nineteen (19) individual sectors.
Programming of the protection circuitry begins on the falling edge of the WE pulse and is terminated with the
rising edge of the same. Sector addresses must be held constant during the WE pulse. See “(13) Sector
Protection Timing Diagram” in
for sector protection waveforms and algorithm.
To verify programming of the protection circuitry, the programming equipment must force V
with CE and OE at V
(A
devices will read 00h for unprotected sector. In this mode, the lower order addresses, except for A
are DON’T CARES. Address locations with A
A-
This feature allows temporary unprotection of previously protected sectors of the MBM29SL800TD/BD devices
in order to change data. The Sector Unprotection mode is activated by setting the RESET pin to high voltage
(V
addresses. Once the V
again. See “(14) Temporary Sector Unprotection Timing Diagram” in
Sector Unprotection Algorithm” in FLOW CHART.
The MBM29SL800TD/BD devices may be reset by driving the RESET pin to V
requirement and has to be kept low (V
Any operation in the process of being executed will be terminated and the internal state machine will be reset
to the read mode 20 s after the RESET pin is driven low. Furthermore, once the RESET pin goes high, the
devices require an additional t
be in the standby mode for the duration of the pulse and all the data output pins will be tri-stated. If a hardware
reset occurs during a program or erase operation, the data at that particular location will be corrupted. Please
note that the RY/BY output signal should be ignored during the RESET pulse. See “(9) RESET, RY/BY Timing
Diagram” in TIMING DIAGRAM for the timing diagram. Refer to Temporary Sector Unprotection for additional
functionality.
6
1
ID
, A
requires to apply to V
) . During this mode, formerly protected sectors can be programmed or erased by selecting the sector
V
1
, A
IL
, and A
0
)
(0, 1, 0) will produce a logical “1” code at device output DQ
6
MBM29SL800TD
V
IL
IL
. The sector addresses (A
and WE at V
ID
is taken away from the RESET pin, all the previously protected sectors will be protected
IL
on byte mode.
RH
TIMING DIAGRAM and “(5) Sector Protection Algorithm” in
before it will allow read access. When the RESET pin is low, the devices will
IH
. Scanning the sector addresses (A
IL
) for at least 500 ns in order to properly reset the internal state machine.
IL
1
, while CE is at V
18
V
, A
IL
are reserved for Autoselect manufacturer and device codes.
17
, A
-10/12
16
, A
15
IL
, A
/MBM29SL800BD
and OE is at V
ID
1
14
must be V
on address pin A
, A
FLEXIBLE SECTOR-ERASE ARCHITEC-
13
, and A
TIMING DIAGRAM and “(6) Temporary
18
0
7
, A
for a protected sector. Otherwise the
defined as the parity bit. In order to
IL
17
. (See “MBM29SL800TD/800BD
, A
12
IH
IL
) should be set to the sector to
. Addresses are latched on the
. The RESET pin has a pulse
16
, A
9
and control pin OE,
15
, A
14
ID
, A
DEVICE BUS OP-
on address pin A
13
, and A
FLOW CHART
0
, A
1
-10/12
12
, and A
) while
9
6
15