cy28551-3 Cypress Semiconductor Corporation., cy28551-3 Datasheet - Page 12

• Manufacturer Part Number: cy28551-3
• Description: Universal Clock Generator For Intel, Via And Sis
• Manufacturer: Cypress Semiconductor Corporation.

Document #: 001-05677 Rev. *D
Byte 18: Control Register 18
Table 4. Crystal Recommendations
Crystal Recommendations
The CY28551-3 requires a Parallel Resonance Crystal.
Substituting a series resonance crystal will cause the
CY28551-3 to operate at the wrong frequency and violate the
ppm specification. For most applications there is a 300-ppm
frequency shift between series and parallel crystals due to
incorrect loading.
Crystal Loading
Crystal loading plays a critical role in achieving low ppm perfor-
mance. To realize low ppm performance, the total capacitance
the crystal will see must be considered to calculate the appro-
priate capacitive loading (CL).
Figure 2 shows a typical crystal configuration using the two
trim capacitors. An important clarification for the following
discussion is that the trim capacitors are in series with the
crystal not parallel. It’s a common misconception that load
capacitors are in parallel with the crystal and should be
approximately equal to the load capacitance of the crystal.
This is not true.
Bit
14.31818 MHz
7
6
5
4
3
2
1
0
Frequency
(Fund)
@Pup
0
0
0
0
0
0
0
0
Type
Cut
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
AT
Loading Load Cap
Parallel
Watchdog Autore-
Prog_PCIE_EN
Prog_CPU_EN
RESET_I_EN
Recovery N8
PCIE_N8
FS[D:A]
DF_EN
covery
Name
20 pF
0.1 mW
PCI-E Dial-A-Frequency Bit N8
FS_Override
0 = Select operating frequency by FS(D:A) input pins
1 = Select operating frequency by FSEL_(3:0) settings
Dynamic Frequency for CPU frequency Enable
0 = Disable, 1 = Enable
RESET_I# Enable
0: Disable, 1: Enable.
Programmable SRC frequency enable
0 = Disabled, 1 = Enabled.
Programmable CPU frequency enable
0 = Disabled, 1 = Enabled.
Watchdog Autorecovery Mode
0 = Disable (Manual), 1= Enable (Auto)
Watchdog Recovery Bit
(max.)
Drive
Shunt Cap
Calculating Load Capacitors
In addition to the standard external trim capacitors, trace
capacitance and pin capacitance must also be considered to
correctly calculate crystal loading. As mentioned previously,
the capacitance on each side of the crystal is in series with the
crystal. This means the total capacitance on each side of the
crystal must be twice the specified crystal load capacitance
(CL). While the capacitance on each side of the crystal is in
series with the crystal, trim capacitors (Ce1,Ce2) should be
calculated to provide equal capacitive loading on both sides.
(max.)
5 pF
Figure 2. Crystal Capacitive Clarification
Motional
0.016 pF
(max.)
Description
Tolerance
35 ppm
(max.)
Stability
30 ppm
(max.)
CY28551-3
Page 12 of 29
Aging
(max.)
5 ppm
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