ds2156gn Maxim Integrated Products, Inc., ds2156gn Datasheet - Page 193
ds2156gn
Manufacturer Part Number
ds2156gn
Description
Ds2156, Ds2156l, Ds2156ln T1/e1/j1 Single-chip Transceiver Tdm/utopia Ii Interface
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
1.DS2156GN.pdf
(265 pages)
- Current page: 193 of 265
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DS2156
24.8 Receive FIFO Overrun
Receive FIFO overrun condition indicates that receive FIFO has been written with four cells before ATM
layer reads the cells. The four cells that cause receive FIFO overrun conditions are intact in receive FIFO,
and subsequent cells are not written into receive FIFO until ATM layer reads a cell from receive FIFO for
the port through UTOPIA-II interface. Receive FIFO overrun condition can optionally be made to raise
external interrupt by setting receive FIFO overrun interrupt mask bit U_RCR2.3.
24.9 UTOPIA Diagnostic Loopback
Diagnostic loopback toward the ATM layer side (UTOPIA side) can be enabled through receive control
register 2, U_RCR2.0. In diagnostic loopback, data, clock, and frame-pulse indication generated by the
transmit section of the DS2156 are used instead of the corresponding signals from the physical layer
device. Receive physical interface mode should be configured with the same value as transmit physical
interface mode. Receive active-edge selection bit should be configured as the opposite edge of that used
by the transmit section of the DS2156. It is possible to use the internally generated system clock divided
by 8 in place of TCLK for this mode when enabled with U_TCR2.6.
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