cef830g Hope Microelectronics co., Ltd, cef830g Datasheet - Page 18

• Manufacturer Part Number: cef830g
• Description: Rf42/43 Ism Transmitter
• Manufacturer: Hope Microelectronics co., Ltd

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3.3. Interrupts
The RF42/43 is capable of generating an interrupt signal when certain events occur. The chip notifies the
microcontroller that an interrupt event has been detected by setting the nIRQ output pin LOW = 0. This interrupt
signal will be generated when any one (or more) of the interrupt events (corresponding to the Interrupt Status bits)
shown below occur. The nIRQ pin will remain low until the microcontroller reads the Interrupt Status Register(s)
(Registers 03h–04h) containing the active Interrupt Status bit; the nIRQ output signal will then be reset until the
next change in status is detected. All of the interrupts must be enabled by the corresponding enable bit in the
Interrupt Enable Registers (Registers 05h–06h). All enabled interrupt bits will be cleared when the microcontroller
reads the interrupt status register. If the interrupt is not enabled when the event occurs inside of the chip it will
nottrigger the nIRQ pin, but the status may still be read correctly at anytime in the Interrupt Status registers.
See ―Register 03h. Interrupt/Status 1,‖ and ―Register 04h. Interrupt/Status 2,‖ for a complete list of interrupts.
3.4. Device Code
The device version code is readable from "Register 01h. Version Code (VC)". This is a read only register.
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03
04
05
06
01
R/W
R/W
R/W
R/W
R
R
R
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Interrupt Enable 2
Interrupt Status 1
Interrupt Status 2
Interrupt Enable1
Function/De
Function/Description
scription
Device Version
Reserved
Reserved
enfferr
ifferr
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D7
D7
0
Reserved
entxffafull
Reserved
itxffafull
D6
D6
0
Reserved
entxffaem
Reserved
itxffaem
D5
D5
0
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vc[4]
Reserved
Reserved
Reserved
Reserved
D4
D4
vc[3]
D3
enwut
enext
iwut
D3
iext
vc[2]
D2
ipksent
enpks
enlbd
D2
ilbd
ent
R F 4 2 / 4 3
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vc[1]
D1
enchiprdy
Reserved
Reserved
ichiprdy
vc[0]
D1
D0
POR Def.
Reserved
Reserved
enpor
00h
ipor
D0
Notes
POR
18
Def.
00h
01h
DV
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