cef830g Hope Microelectronics co., Ltd, cef830g Datasheet - Page 76

• Manufacturer Part Number: cef830g
• Description: Rf42/43 Ism Transmitter
• Manufacturer: Hope Microelectronics co., Ltd

Register 30h. Data Access Control
Reset value = 10001101
Name
Type
Bit
Bit
1:0
7
6
5
4
3
2
Tel: [phone]
Reserved
R/
D7
Reserved
Reserved
w
crcdonly
enpactx
crc[1:0]
Name
lsbfrst
encrc
lsbfrst
R/
D6
w
Reserved.
LSB First Enable.
The LSB of the data will be transmitted first if this bit is set.
CRC Data Only Enable.
When this bit is set to 1 the CRC is calculated on the packet data fields only.
Reserved.
Enable Packet TX Handling.
If FIFO Mode (dtmod = 10) is being used automatic packet handling may be
enabled. Setting enpactx = 1 will enable automatic packet handling in the TX
path. Register 30–4D allow for various configurations of the packet structure.
Setting enpactx = 0 will not do any packet handling in the TX path. It will only
transmit what is loaded to the FIFO.
CRC Enable.
Cyclic Redundancy Check generation is enabled if this bit is set.
CRC Polynomial Selection.
00:
01:
10:
11:
Fax: [phone]
CCITT
CRC-16 (IBM)
IEC-16
Biacheva
crcdonly
R/
D5
w
Reserved
R/
D4
w
E-mail: [e-mail]
enpactx
R/
Function
D3
w
encrc
D2
R/
w
R F 4 2 / 4 3
http://www.hoperf.com
D1
crc[1:0]
R/
w
D0
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