74LVC109PW,118 NXP Semiconductors, 74LVC109PW,118 Datasheet - Page 12

• Manufacturer Part Number: 74LVC109PW,118
• Description: IC DUAL JK F-F POS-EDGE 16TSSOP
• Manufacturer: NXP Semiconductors
• Series: 74LVCr
• Type: JK Typer

Specifications of 74LVC109PW,118

• Output Type: Differential
• Package / Case: 16-TSSOP
• Function: Set(Preset) and Reset
• Number Of Elements: 2
• Number Of Bits Per Element: 1
• Frequency - Clock: 150MHz
• Trigger Type: Positive Edge
• Current - Output High, Low: 24mA, 24mA
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Number Of Circuits: 2
• Logic Family: LVC
• Logic Type: J-K Positive Edge Triggered Flip Flop
• Polarity: Inverting/Non-Inverting
• Input Type: Single-Ended
• Propagation Delay Time: 4 ns at 3.3 V
• High Level Output Current: - 24 mA
• Low Level Output Current: 24 mA
• Supply Voltage (max): 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Supply Voltage (min): 1.2 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Delay Time - Propagation: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 74LVC109PW-T; 74LVC109PW-T; 935191070118

Philips Semiconductors
2004 Mar 18
handbook, full pagewidth
Dual JK flip-flop with set and reset;
positive-edge trigger
V
V
V
Fig.7
M
M
OL
= 1.5 V at V
= 0.5V
and V
CC
Set (nSD) and reset (nRD) input to output (nQ and nQ) propagation delays, the set and reset pulse widths
and the nRD and nSD to nCP removal time.
OH
at V
are typical output voltage drop that occur with the output load.
CC
CC
< 2.7 V.
2.7 V.
nCP input
nSD input
nRD input
nQ output
nQ output
GND
GND
GND
V OH
V OH
V OL
V OL
V I
V I
V I
V M
t W
V M
V M
t PLH
t PHL
12
V M
t W
t PHL
t PLH
V M
MNA861
t rem
Product specification
74LVC109