74LVT16374ADL,112 NXP Semiconductors, 74LVT16374ADL,112 Datasheet - Page 13

• Manufacturer Part Number: 74LVT16374ADL,112
• Description: IC 16BIT EDG-TRIG D FF 48SSOP
• Manufacturer: NXP Semiconductors
• Series: 74LVTr
• Type: D-Type Busr

Specifications of 74LVT16374ADL,112

• Function: Standard
• Output Type: Tri-State Non Inverted
• Number Of Elements: 2
• Number Of Bits Per Element: 8
• Frequency - Clock: 150MHz
• Delay Time - Propagation: 3ns
• Trigger Type: Positive Edge
• Current - Output High, Low: 32mA, 64mA
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-SSOP
• Logic Family: LVT
• Technology: BiCMOS
• Number Of Bits: 16
• Number Of Elements: 2
• Clock-edge Trigger Type: Positive-Edge
• Polarity: Non-Inverting
• Operating Supply Voltage (typ): 3.3V
• Package Type: SSOP
• Propagation Delay Time: 6ns
• Low Level Output Current: 64mA
• High Level Output Current: -32mA
• Frequency (max): 150MHz
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 74LVT16374ADL; 74LVT16374ADL; 935184410112

NXP Semiconductors
Fig 12. Package outline SOT362-1 (TSSOP48)
74LVT_LVTH16374A_7
Product data sheet
TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1 mm
DIMENSIONS (mm are the original dimensions).
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
UNIT
mm
VERSION
OUTLINE
SOT362-1
48
1
Z
max.
y
1.2
A
pin 1 index
0.15
0.05
A
1
1.05
0.85
A
2
IEC
0.25
A
3
e
D
0.28
0.17
b
p
All information provided in this document is subject to legal disclaimers.
MO-153
JEDEC
0.2
0.2
0.1
0.1
c
REFERENCES
12.6
12.4
D
(1)
Rev. 07 — 22 March 2010
0
b
p
74LVT16374A; 74LVTH16374A
E
6.2
6.0
(2)
w
JEITA
scale
M
2.5
0.5
25
24
e
3.3 V 16-bit edge-triggered D-type flip-flop; 3-state
H
8.3
7.9
c
E
5 mm
L
A
1
2
A
1
0.8
0.4
L
p
0.50
0.35
Q
H
E
E
PROJECTION
detail X
EUROPEAN
0.25
v
L
L
0.08
p
w
Q
(A )
0.1
© NXP B.V. 2010. All rights reserved.
y
3
ISSUE DATE
A
99-12-27
03-02-19
θ
0.8
0.4
Z
A
X
SOT362-1
v
M
8
0
θ
o
o
13 of 19
A