t71l6808a TM Technology Inc., t71l6808a Datasheet - Page 9

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t71l6808a

Manufacturer Part Number
t71l6808a
Description
Octal 10/100 Switch With Embedded Memory
Manufacturer
TM Technology Inc.
Datasheet
restart the auto-negotiation process through MDIO using PHY address increasingly from 01000b to
01111b. After restarting auto-negotiation, the T71L6808A will continuously poll the link status and
link partner's ability which including speed, duplex and flow control of the PHY devices via MDIO.
The following is the management frame format :
Operation PRE
Read
Write
24LC02 Interface
The 24LC02 interface is a 2-wire serial EEPROM interface providing 2K bits storage space. After
power on reset, the T71L6808A uses Random Read and Sequential Read commands to auto-load
configuration settings, pause frame source address and so on. After auto-loaded, the 24LC02
interface pins SCL and SDA are tri-stated for on-line updating 24LC02 contents through a parallel
port.
Taiwan Memory Technology, Inc. reserves the right
to change products or specifications without notice.
tm
CH
TE
1…1 01
1…1 01
ST
OP
10
01
AAAAA RRRRR
PHYAD
AAAAA RRRRR
REGAD
P. 9
TA DATA
Z0 DDDDDDDDDDDDDDDD Z
10 DDDDDDDDDDDDDDDD Z
Preliminary T71L6808A
Publication Date:May. 2001
Revision:0.A
IDLE

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