isl8120 Intersil Corporation, isl8120 Datasheet - Page 28

• Manufacturer Part Number: isl8120
• Description: Dual/n-phase Buck Pwm Controller With Integrated Drivers
• Manufacturer: Intersil Corporation

channel 1 depending upon configuration) is a precision 1V
±1% with 50mV hysteresis.
For the R
usually higher than the number calculated from Equation 6.
The reason of which is practical especially for low DCR
applications the PCB and inductor pad soldering resistance
would have large effects in total impedance affecting the
DCR voltage to be sensed.
When OCP is triggered, the controller pulls EN/FF low
immediately to turn off UGATE and LGATE. However, if the
output overshoot is greater than 113% at EN/FF = LOW,
LGATE turns ON until the output voltage drops below 87%.
A delay time, equal to 3 soft-start intervals, is entered to
allow the disturbance to clear. After the delay time, the
controller then initiates a soft-start interval. If the output
voltage comes up and returns to the regulation, PGOOD
transitions high. If the OC trip is exceeded during the
soft-start interval, the controller pulls EN/VFF low again. The
PGOOD signal will remain low and the soft-start interval will
be allowed to expire. Another soft-start interval will be
initiated after the delay interval. If an overcurrent trip occurs
again, this same cycle repeats until the fault is removed.
There is a100ns delay to prevent any fault triggering during
startup or load transient. For a hard short of the output, the
overcurrent protection reduces the regulator RMS output
current much less than 60% of the full load current by putting
the controller into hiccup mode.
Internal Series Linear and Power Dissipation
The VIN pin is connected to PVCC with an internal series
linear regulator (1W Typical), which is internally
compensated. The PVCC and VIN pins should have the
recommended bypasses connected to GND for proper
operation. The internal series linear regulator’s input (VIN)
can range between 2.97V to 22V. The internal linear
regulator is to provide power for both the internal MOSFET
drivers through the PVCC pin and the analog circuitry
through the VCC pin. The VCC pin should be connected to
the PVCC pin with an RC filter to prevent high frequency
driver switching noise from entering the analog circuitry.
When VIN drops below 5.0V, the pass element will saturate;
PVCC will track VIN, minus the dropout of the linear
ISEN
chosen for OCP setting, the final value is
28
ISL8120
regulator. When used with an external 5V supply, VIN pin is
recommended to be tied directly to PVCC.
The LDO is capable to supply 250mA with regulated 5.4V
output. In 3.3V input applications, when the VIN pin voltage
is 2.97V, the LDO still can supply 150mA while maintaining
LDO output voltage higher than VCC falling threshold to
keep IC operating. Figure 17 shows the LDO voltage drop
under different load current. However, its thermal capability
should not be exceeded. The power dissipation inside the IC
could be estimated with Equation 7.
FIGURE 16. INTERNAL REGULATOR IMPLEMENTATION
I
P
1µF
VIN
IC
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
=
2.5
=
5V
(
VIN PVCC
⎛
⎜
⎝
VCC
Z1
Q
----------------------------- -
PVCC @ 250mA + Iq
2Ω
3.0
FIGURE 17. PVCC vs VIN VOLTAGE
G1
V
–
GS1
•
N
3.5
Z2
Q1
PVCC
2.65V TO 5.6V
) I
+
⋅
4.0
VIN PIN VOLTAGE (V)
Q
----------------------------- -
VIN
PVCC @ 140mA + Iq
G2
V
Iq IS AROUND 15mA
GS2
•
+
4.5
N
P
Q2
DR
⎞
⎟
⎠
10µF
PVCC @ 100mA + Iq
5.0
•
PVCC F
5.5
2.97V TO 26.4V
•
6.0
SW
+
March 28, 2008
6.5
I
VIN
Q_VIN
(EQ. 7)
FN6641.0
7.0