isl6341a Intersil Corporation, isl6341a Datasheet - Page 10

• Manufacturer Part Number: isl6341a
• Description: 5v Or 12v Single Synchronous Buck Pulse-width Modulation Pwm Controller
• Manufacturer: Intersil Corporation

Overvoltage Protection
The output is protected against overvoltage conditions by
monitoring the VOS pin, similar to undervoltage. If the output
goes too high (25% above 0.8V = 1.0V nominal on VOS), the
output will latch off. As shown in Figure 8, UGATE will be
forced low, but LGATE will be forced high (to try to pull-down
the output) until the output drops to 1/2 of the normal voltage
(50% of 0.8V = 0.4V nominal on VOS).
Overvoltage latch-off requires toggling V
up) to restart (toggling COMP/EN will NOT restart it). The OV
protection is not enabled until the rising V
exceeded.
If the VOS pin is disconnected, a small bias current on-chip
will force an overvoltage condition.
PGOOD
The PGOOD function output monitors the output voltage
using the same VOS pin and resistor divider of the
undervoltage and overvoltage protection, but with separate
comparators for each. The rising OV trip point (10% above
0.8V = 0.88V nominal on VOS) and the falling UV trip point
(10% below 0.8V = 0.72V nominal on VOS) will trip sooner
125%
GND>
GND>
GND>
GND>
GND>
GND>
75%
50%
LGATE (12V/DIV)
UGATE (24V/DIV)
UGATE (24V/DIV)
LGATE (12V/DIV)
V
FIGURE 7. UNDERVOLTAGE PROTECTION
FIGURE 8. OVERVOLTAGE PROTECTION
OUT
(0.5V/DIV)
V
OUT
10
(0.25V/DIV)
CC
CC
(power-down and
POR trip point is
ISL6341, ISL6341A, ISL6341B
than the protection, in order to give an early warning to a
possible problem. The response time of the comparators
should be less than 1µs; the separate VOS input is not slowed
down by the compensation on the FB pin. If a fast or robust
response is not required, it may be possible to connect the
VOS pin to the FB pin, in order to share the resistor divider. If
the VOS pin is accidentally disconnected, a small bias current
on-chip will force an overvoltage condition.
Figure 9 shows how the PGOOD output responds to a ramp
that trips in each direction (without reaching either protection
trip point at ±25%); PGOOD is valid (high) as long as V
(and thus VOS) is within the ±10% window.
The PGOOD output is an open-drain pull-down NMOS
device; it can deliver 4.0mA of sink current at 0.3V when
power is NOT GOOD. A pull-up resistor to an external supply
voltage sets the high level voltage when power is GOOD. The
supply should be ≤6.0V, and is usually the one that powers
the logic monitoring the PGOOD output. If PGOOD function is
not used, the PGOOD pin can be left floating.
The PGOOD pin will be held low once V
POR trip point, and during soft-start (but if the PGOOD supply
is up before or with V
logic has enough voltage to turn on the output). Once the
soft-start ramp is done (V
100% of their final value), the PGOOD pin will be allowed to
go high, if the output voltage is within the expected window.
There is no additional delay after soft-start is done.
Note that the overcurrent protection does directly affect the
PGOOD output, before the output voltage monitoring would
sense when V
undervoltage protection circuits don’t directly effect PGOOD,
but since the PGOOD UV and OV windows are tighter, the
PGOOD output should already be low by the time either
protection is tripped.
110%
GND>
GND>
90%
FIGURE 9. PGOOD UNDERVOLTAGE AND OVERVOLTAGE
V
PGOOD (2V/DIV)
OUT
OUT
(0.25V/DIV)
drops 10%. The overvoltage and
CC
, it may be pulled high initially until the
OUT
, VOS and FB should each be at
CC
is above the rising
August 20, 2007
FN6538.0
OUT