isl6341a Intersil Corporation, isl6341a Datasheet - Page 7

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isl6341a

Manufacturer Part Number
isl6341a
Description
5v Or 12v Single Synchronous Buck Pulse-width Modulation Pwm Controller
Manufacturer
Intersil Corporation
Datasheet

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and then around 4ms for the output voltage to ramp up (0% to
100%) between t3 and t4. The PGOOD output is allowed to go
high at t4 if VOS (and thus V
window.
Soft-Start and Pre-Biased Outputs
Functionally, the soft-start internally ramps the reference on the
non-inverting terminal of the error amp from zero to 0.8V in a
nominal 4ms. The output voltage will thus follow the ramp, from
zero to final value, in the same 4ms. The ramp is created
digitally, so there will be small discrete steps. There is no simple
way to change this ramp rate externally, as it is fixed by the
300kHz (or 600kHz) switching frequency (and the ramp and
delay time is the same for both frequencies).
After an initialization period (t2 to t3), the error amplifier
(COMP/EN pin) is enabled, and begins to regulate the
converter’s output voltage during soft-start. The oscillator’s
triangular waveform is compared to the ramping error amplifier
voltage. This generates PHASE pulses of increasing width that
charge the output capacitors. When the internally generated
soft-start voltage exceeds the reference voltage (0.8V), the soft-
start is complete, and the output should be in regulation at the
expected voltage. This method provides a rapid and controlled
output voltage rise; there is no large in-rush current charging
the output capacitors. The entire start-up sequence from POR
typically takes 9ms; 5ms for the delay and OCP sample, and
4ms for the soft-start ramp.
Figure 3 shows the normal V
begins at t0, and the output ramps between t1 and t2. If the
output is pre-biased to a voltage less than the expected
value (as shown by the magenta curve), the ISL6341,
ISL6341A, ISL6341B will detect that condition. Neither
MOSFET will turn-on until the soft-start ramp voltage
exceeds the output; V
there.
There is a restriction for the pre-bias case; if the pre-biased
V
discharged, and will not be able to restart. For example, if
V
5V, then the voltage left on the boot cap (to UGATE) will not
be able to turn on the upper FET. The simple solution here is
to use the 12V for V
diode - Vth upper FET > V
If the output is pre-biased to a voltage above the expected
value (as in the red curve), neither MOSFET will turn-on until
the end of the soft-start, at which time it will pull the output
voltage quickly down to the final value. Any resistive load
connected to the output will help pull-down the voltage (at
the RC rate of the R of the load and the C of the output
capacitance).
One exception to the over-charged case is if the pre-bias is
high enough to trip OV protection (>1V on VOS); then
LGATE will pulse to try to pull V
latched in this mode until V
OUT
IN
= 12V, V
is greater than V
OUT
= 8V and prebiased to 6V, and V
GD
OUT
GD
. The guideline is to make V
, then the boot cap may get
OUT
starts seamlessly ramping from
CC
OUT
OUT
7
power is toggled.
OUT
to prevent this condition.
) is within the PGOOD
curve in blue; initialization
lower. The IC will remain
ISL6341, ISL6341A, ISL6341B
GD
GD
is only
-
If the V
the boot diode) is from a different supply that comes up after
V
voltage ramp. Once the undervoltage protection is enabled
(at the end of the soft-start ramp), the output will latch off.
Therefore, for normal operation, V
enough before or with V
alternative is add sequencing logic to the COMP/EN pin to
delay the soft-start until the V
(see “Input Voltage Considerations” on page 11).
If the IC is disabled after soft-start (by pulling COMP/EN pin
low), and then enabled (by releasing the COMP/EN pin),
then the full initialization (including a new OCP sample) will
take place.
If the output is shorted to GND during soft-start, the OCP will
handle it, as described in the next section.
Overcurrent Protection (OCP)
The overcurrent function protects the converter from a shorted
output by using the lower MOSFET’s ON-resistance, r
to monitor the current. A resistor (R
overcurrent trip level (see “Typical Application” diagram on
page 3). This method enhances the converter’s efficiency and
reduces cost by eliminating a current sensing resistor.
Following POR and release of COMP/EN, the ISL6341,
ISL6341A, ISL6341B initiates the Overcurrent Protection
sample and hold operation. The LGATE driver is disabled to
allow an internal 10μA current source to develop a voltage
across R
samples this voltage (which is referenced to the GND pin) at
the LGATE/OCSET pin, and holds it in a counter and DAC
combination. This sampled voltage is held internally as the
Overcurrent Set Point, for as long as power is applied, or
until a new sample is taken after coming out of a COMP/EN
shut-down.
GND>
GND>
GND>
CC
, the soft-start would start its cycle, but with no output
IN
OCSET
V
V
V
to the upper MOSFET drain (or the V
OUT
OUT
OUT
FIGURE 3. SOFT-START WITH PRE-BIAS
OVER-CHARGED
PRE-BIASED
NORMAL
. The ISL6341, ISL6341A, ISL6341B
t0
CC
. If this is not possible, then the
t1
IN
(and V
IN
OCSET
(and V
GD
) programs the
) supply is ready
GD
) must be high
GD
t2
August 20, 2007
voltage to
DS(ON)
FN6538.0
,

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