SB16C1058-TQFP128 IK Semicon Co., Ltd, SB16C1058-TQFP128 Datasheet - Page 14

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SB16C1058-TQFP128

Manufacturer Part Number
SB16C1058-TQFP128
Description
Octal-uart Controller With 256-byte Fifo
Manufacturer
IK Semicon Co., Ltd
Datasheet
IN16C1058
OCTAL UART WITH 256-BYTE FIFO
JUNE 2009
6. Functional Description
14
REV 1.0
6.1 Normal mode and MIO mode
IN16C1058 UART supports Normal mode in which the chip operates as other common
Octal-UARTs and MIO mode which supports SystemBase’s MIO mode. The mode can be
selected by MODE input. Furthermore, the UART supports 256-byte FIFO which
enhances system performance and prevents Overrun Errors in multiple serial
communication system. When FIFO is enabled, it has a register configuration compatible
with 64-byte FIFO and 16C654, so it becomes compatible with 16C654. If you enable
256-byte FIFO, you use the unique supreme function that IN16C1058 offers. It offers
communication speed up to 5.3Mbps and more enhanced functions that other UARTs with
128-byte FIFO do not.
IN16C1058 can select hardware/software flow control. Hardware flow control significantly
reduces software overhead and increases system efficiency by automatically controlling
serial data flow using the nRTS output and nCTS input signals. Software flow control
automatically controls data flow by using programmable Xon/Xoff characters. In addition,
IN16C1058 has to control communication bus in RS422/485 communication in order to
have a stable data communication. By automatically controlling this on hardware level ,
IN16C1058 allows users to use the chip more easily.
IN16C1058 can be configured as Normal mode or MIO mode depending on the MODE
input. In a Normal application, the device operates in Normal mode with MODE = 0b and
operates in MIO mode with MODE = 1b.
When IN16C1058 is operating in Normal mode, only ADDR[5:0], DATA[7:0], nIOR, nIOW
and nCS signals are used. The internal Options Registers structure, controls pins for MIO
Bus cannot be used and only internal UART Registers are accessible.
In Normal mode, the device operates just as other Octal-UARTs that can be found
elsewhere. Some pins are not used in this mode and the pins are listed below in ‘Table 3:
Pin Usage between Normal mode and MIO mode’.
MIO mode is a structure designed by SystemBase in which UART region and Option
region can be accessed through MIO(MultiPort I/O) Bus and I/O Bus. Refer to table ‘Table
3’ to see its usage. Each channel’s Internal Registers for Octal-UART can be accessed
through UART region. SystemBase has designed Option Registers to control serial
communication and this can be accessed through Option region.
With the use of MIO Bus structure and Option Registers, up to 32 ports can be expanded
by 8 ports.

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