SB16C1058-TQFP128 IK Semicon Co., Ltd, SB16C1058-TQFP128 Datasheet - Page 41

• Manufacturer Part Number: SB16C1058-TQFP128
• Description: Octal-uart Controller With 256-byte Fifo
• Manufacturer: IK Semicon Co., Ltd

7.9 Modem Status Register (MSR, Page 0)
7.10 Scratch Pad Register (SPR, Page 0)
7.11 Divisor Latches (DLL, DLM, Page 1)
MSR provides the current status of control signals from modem or auxiliary devices.
MSR[3:0] are set to ‘1’ when input from modem changes and cleared to ‘0’ as soon as
CPU reads MSR. Table 16 shows MSR bit settings.
This 8-bit Read/Write Register does not control the UART in anyway. It is intended as a
scratch pad register to be used by the programmer to hold data temporarily.
Two 8-bit registers which store the 16-bit divisor for generation of the clock in baud rate
generator. DLM stores the most significant part of the divisor, and DLL stores the least
significant part of the divisor. Divisor of zero is not recommended.
Note that DLL and DLM can only be written to before sleep mode is enabled, i.e., before
IER[4] is set. Chapter 6.7 describes the details of divisor latches.
Table 16:
Bit
7
6
5
4
3
2
1
0
Symbol
MSR[7]
MSR[6]
MSR[5]
MSR[4]
MSR[3]
MSR[2]
MSR[1]
MSR[0]
Modem Status Register Description
OCTAL UART WITH 256-BYTE FIFO
Description
nDCD Input Status.
nRI Input Status.
nDSR Input Status.
nCTS Input Status.
Delta nDCD Input Status.
Delta nRI Input Status.
Delta nDSR Input Status.
Delta nCTS Input Status.
Complement of Data Carrier Detect (nDCD) input.
In loop back mode this bit is equivalent to OUT2 in the MCR.
Complement of Ring Indicator (nRI) input.
In loop back mode this bit is equivalent to OUT1 in the MCR.
Complement of Data Set Ready (nDSR) input.
In loop back mode this bit is equivalent to DTR in the MCR.
Complement of Clear To Send (nCTS) input.
In loop back mode this bit is equivalent to RTS in the MCR.
0 : No change on nDCD input (default).
1 : Indicates that the nDCD input state has changed.
0 : No change on nRI input (default).
1 : Indicates that the nRI input state changed from ‘0’ to ‘1’.
0 : No change on nDSR input (deault).
1 : Indicates that the nDSR input state has changed.
0 : No change on nCTS input (deault).
1 : Indicates that the nCTS input state has changed.
IN16C1058
JUNE 2009
REV 1.0
41