cs4216 Cirrus Logic, Inc., cs4216 Datasheet - Page 15

• Manufacturer Part Number: cs4216
• Description: 16-bit Stereo Audio Codec Logic
• Manufacturer: Cirrus Logic, Inc.

SERIAL MODE 2, SM2
Serial Mode 2 is enabled by setting SMODE3 =
SMODE2 = 0, and SMODE1 = 1. SM2 is simi-
lar to SM1 except that SCLK is fixed at 256
Fs and is the master clock instead of CLKIN.
The CLKIN pin is ignored in this mode and
should be tied low. In SM2, the sample fre-
quency will scale linearly with the frequency of
SCLK. Up to four codecs may occupy the serial
bus since each codec requires only 64 bit periods
and a frame is fixed at 256 bit periods. The se-
rial data format is the same as SM1 and is
illustrated in Figures 5 and 6.
The multifunction pins in SM2 are defined iden-
tically to SM1. See Serial Mode 1, SM1 section
for more details.
SERIAL MODE 3, SM3
Serial Mode 3 is en ab led by setting
SMODE3 = 0, SMODE2 = 1 and SMODE1 = 0.
This mode is designed to interface easily to
DSPs and has the added versatility of a program-
mable number of bits per frame, a master mode,
and one extra bit of D/A attenuation. In SM3,
two of the parallel digital input bits and two of
the parallel digital output bits are available.
DS83F2
SSYNC
SSYNC
DATA
or
FS
Word A
Sub-frame 1
WS
Word B
WS
Word A
Sub-frame 2
WS
Figure 7. SM1, SM2 - 256 Bits per Frame.
256 SCLK Periods
Word B
FRAME n
WS
Word A
Sub-frame 3
WS
Word B
WS
Master Clock Frequency
In SM3, the master clock, CLKIN, must be
256
mum sample frequency, the master clock
frequency must be 12.288 MHz. SCLK and
SSYNC must be synchronous to CLKIN.
D/A Attenuation
SM3 has one more bit per channel allocated for
D/A attenuation which doubles the attenuation
range. Figure 5 illustrates the serial data in,
SDIN, sub-frame for all SM3 sub-modes. The
upper portion of this figure shows modes SM1
and SM2 where the D/A attenuation is located in
Word B, bits 53 through 60. Four bits allow at-
tenuation on each channel from 0 dB down to
-22.5 dB using 1.5 dB steps. In SM3 the attenu-
ation bits are still located in Word B, but start at
bit 51 of the sub-frame. This allows five bits of
attenuation per channel instead of four, produc-
ing an attenuation range for each channel from
0 dB down to -46.5 dB.
In SM3 MF5:DO2 is a general purpose output
and MF6:DI2 is a general purpose input. The
other six multifunction pins are used to select
sub-modes under SM3.
SM3 is divided into two sub-modes, Master and
Slave. In Master sub-mode, the CS4216 gener-
ates SSYNC and SCLK, while in Slave
sub-mode SSYNC and SCLK must be generated
Word A
Sub-frame 4
WS
Fs
Word B
max
. For example, given a 48 kHz maxi-
FS
Word A
Sub-frame 1
FRAME (n+1)
WS
Word B
SFS2
FS = Frame Sync
WS =
MF8:
CS4216
0
0
1
1
Low followed by
Two High Bits
One High
Optional
Not Needed
MF7:
SFS1
0
1
0
1
Sub-
frame
1
2
3
4
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