cs4216 Cirrus Logic, Inc., cs4216 Datasheet - Page 4

• Manufacturer Part Number: cs4216
• Description: 16-bit Stereo Audio Codec Logic
• Manufacturer: Cirrus Logic, Inc.

SWITCHING CHARACTERISTICS
Levels: Logic 0 = 0V, Logic 1 = VD)
Notes: 7. When the CS4216 is in master mode (SSYNC and SCLK outputs), the SCLK duty cycle is 50%.
4
Input clock (CLKIN) frequency
CLKIN low time
CLKIN high time
Sample Rate
DI pins setup time to SCLK edge
DI pins hold time from SCLK edge
DO pins delay from SCLK edge
SCLK and SSYNC output delay
from CLKIN rising
SCLK period
SCLK high time
SCLK low time
SDIN, SSYNC setup time to SCLK edge
SDIN, SSYNC hold time from SCLK edge
SDOUT delay from SCLK edge
Output to Hi-Z state
Output to non-Hi-Z
RESET pulse width low
CCS low to CCLK rising
CDIN setup to CCLK falling
CCLK low to CDIN invalid (hold time)
CCLK high time
CCLK low time
CCLK Period
CCLK rising to CDOUT data valid
CCLK rising to CDOUT Hi-Z
CCLK falling to CCS high
The equation is based on the selected sample frequency (Fs) and the number of bits per frame (bpf).
Parameter
Master Mode (Note 1)
Master Mode (Note 7)
SM2, SM3, SM4:
bit 64 (Note 1)
SM4 (Note 1)
SM4 (Note 1)
SM4 (Note 1)
SM4 (Note 1)
SM4 (Note 1)
SM4 (Note 1)
SM4 (Note 1)
SM4 (Note 1)
SM4 (Note 1)
bit 1 (Note 1)
Slave Mode
Slave Mode
Slave Mode
Slave Mode
Slave Mode
(T
A
(Note 1)
(Note 1)
(Note 1)
= 25 C; VA, VD = +5V, outputs loaded with 30 pF; Input
SM1:
Symbol
CLKIN
CLKIN
t ccdov
t cccsh
t cclkw
t ccdot
t discc
t ccdih
t cclhh
t sckw
t cslcc
t sckh
t cclhl
t sckl
t pd2
t pd3
t pd1
t ckh
t ckl
t h1
t s2
t h2
t s1
t hz
t nz
Fs
2.048
1.024
Min
500
15
15
10
30
75
30
30
15
10
15
25
15
10
25
25
75
4
8
0
-
-
-
-
-
-
1/(Fs*bpf)
24.576
12.288
Typ
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
CS4216
Max
25.6
12.8
50
50
28
12
30
30
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
DS83F2
Units
MHz
MHz
kHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
s