cs4216 Cirrus Logic, Inc., cs4216 Datasheet - Page 42

• Manufacturer Part Number: cs4216
• Description: 16-bit Stereo Audio Codec Logic
• Manufacturer: Cirrus Logic, Inc.

DIP SWITCH MAPPING TO MULTI-FUNC-
TION PINS
The two PALs on the evaluation board decode
the DIP switches to configure the codec into a
particular mode. These PALs are not necessary
in a design since only one mode is usually used
and can be hard wired. Figure 9 and Figure 10
list the PAL equations used for decoding.
Table 4 shows the CS4216/8 multi-function pin
settings for each possible DIP switch configura-
tion. Refer to the CS4216/8 data sheets to
determine pin settings for sample frequencies.
Once a suitable mode has been chosen using the
evaluation board, this table will show the hard
wire configuration for each multi-function pin.
Example Mode Settings
Following are two examples of how to set a se-
rial mode with the DIP switches and then
determine the multi-function pin settings for the
codec. These modes were chosen for illustration
only, not to suggest that they are better than
other modes.
A commonly used mode is SM3 Master (SM3-M
on the CS4218), 64 BPF, 44.1kHz sampling rate,
and bit-long SSYNC. To configure the codec in
this mode, set SPF2=MA=1 and all other DIP
42
SPF2 SPF1 MA
DIP SWITCHES
0
0
0
0
1
1
1
1
0
1
1
1
1
1
1
1
x
x
0
1
0
0
1
1
SMODE SMODE SMODE
3
0
0
0
0
1
1
1
1
BPF=0
BPF>0
2
0
0
1
1
1
1
TS1
1
0
1
0
0
0
0
0
Table 4. CS4216 Pin Decode
CDOUT
CDOUT
CDOUT
CDOUT
BPF2
DIV1
MF1
DO4
DO4
BPF1
DIV2
CDIN
CDIN
CDIN
CDIN
MF2
DO3
DO3
switches to zero. From Table 4, the SMODE3,
SMODE2, and SMODE1 pins are set to 010, re-
spectively. The DIV1, DIV2, and DIV3 DIP
switches will set the sampling frequency by di-
rectly mapping to the MF1, MF2, and MF3 pins
as 000. The MA DIP switch sets the MF4 pin
high for master mode. multi-function pins MF5
and MF6 become the general purpose I/O pins
DO2 and DI2, respectively. In this particular
mode, MF7 determines the high time for the
SSYNC signal. The MF7 pin is set low by the
TS1 switch to generate the bit-long SSYNC. In
all other applicable cases, the TS1 switch is used
for time-slot configuration. 64 BPF is selected
by setting the MF8 pin low with the BPF1
switch.
SM4 is a powerful mode which reduces data
transfer bandwidth to facilitate easier use with
low cost DSPs. As an example, consider SM4,
Slave, 64 BPF, Time-slot 2, and a 22.05 kHz
sampling
SPF2=SPF1=DIV1=TS1=BPF1=1 and all other
DIP switches to zero. Table 4 shows that the
SMODE3, SMODE2, and SMODE1 pins will be
set to 110, respectively. The multi-function pins
MF1-4 will become the control port interface.
MF5 serves as the interrupt pin INT. BPF2 and
BPF1 will set the codec to 64 BPF by mapping
directly to the MF6 and MF7 pins as 01, respec-
tively. The second time-slot is chosen with TS1
CCLK
CCLK
CCLK
CCLK
MF3
DI3
DI3
DI3
DIV3
CS4216 Multifunction Pins
MA=0
MA=1
CCS
CCS
CCS
CCS
MF4
DI4
DI4
rate.
MF5
DO2
DO2
DO2
DO2
INT
INT
INT
INT
BPF2=0
BPF2=1
DIV1
DIV1
MF6
DI2
DI2
DI2
DI2
CDB4216
BPF1
TS1
DIV2
DIV2
MF7
TS1
TS1
TS1
TS1
DS83DB4
MF8
BPF1
TS2
TS2
TS2
TS1
TS2
DIV3
DIV3
Set