t81l0003a TM Technology Inc., t81l0003a Datasheet - Page 10

• Manufacturer Part Number: t81l0003a
• Description: Reduced I/o 8-bit Mcu
• Manufacturer: TM Technology Inc.

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Where SM0, SM1 specify the serial port mode, as follows:
Using Timer 1 to Generate Baud Rates
When Timer 1 is used as the baud rate generator, the baud rates in Modes 1 and 3 are determined by the Timer 1 overflow
rate and the value of SMOD as follows:
Mode 1, 3 Baud Rate =2
The Timer 1 interrupt should be disabled in this application. The Timer itself can be configured for either “timer” or
“counter” operation, and in any of its 3 running modes. In the most typical applications, it is configured for “timer”
operation, in the auto-reload mode (high nibble of TMOD = 0010B). In that case the baud rate is given by the formula:
Mode 1, 3 Baud Rate =2
One can achieve very low baud rates with Timer 1 by leaving the Timer 1 interrupt enabled, and configuring the Timer to
run as a 16-bit timer (high nibble of TMOD = 0001B), and using the Timer 1 interrupt to do a 16-bit software reload.
Using Timer 2 to Generate Baud Rates
Timer2 is selected as the baudrate generator by setting TCLK and/or RCLK in T2CON register as followed.
T2CON (
T2CON.7: TF2 Timer2 overflow flag set by timer2 overflow and must be cleared by software. TF2 will not be set when
either RCLK=1 or TCLK=1.
T2CON.6: EXF2 Timer 2 external flag set when either a capture or reload is caused by a negative transition on T2EX and
EXEN2=1. when timer2 interrupt is enabled, EXF2=1 will cause the CPU to vector to the timer2 interrupt routine. EXF2
must be cleared by software.
T2CON.5: RCLK Receive clock flag. When set, cause the serial port to use timer2 overflow pulses for its receive clock in
mode 1 and 3. RCLK=0 causes timer1 overflow to be used for the receive clock
T2CON.4: TCLK Transmit clock flag. When set, cause the serial port to use timer2 overflow pulses for its transmit clock
in mode 1 and 3. TCLK=0 causes timer1 overflow to be used for the transmit clock
T2CON.3: EXEN2 Timer2 external enable flag. When set, allows a capture or reload to occur as a result of a negative
transition on T2EX if timer2 is not being used to clock the serial port. EXEN2=0 causes timer2 to ignore events at T2EX.
T2CON.2: Start/stop control for timer2. A logic 1 starts the timer
TM Technology, Inc. reserves the right
to change products or specifications without notice.
SM0 SM1
0
0
1
1
address :
MSB
TF2
CH
TE
0
1
0
1
C8h)
Mode
EXF2
SMOD
SMOD
0
1
2
3
/32* (Timer 1 Overflow Rate)
*(Oscillator Frequency)/ 32/12 / [256 _ (TH1)]
Description
shift register
8-bit UART
9-bit UART
9-bit UART
RCLK
TCLK
Baud Rate
f
variable
UART f OSC /64 or f OSC /32
variable
OSC
/ 12
EXEN2
P. 10
TR2
Publication Date: SEP. 2004
C/T2
T81L0003A
CP/RL2
LSB
Revision: C