mcf51mm256 Freescale Semiconductor, Inc, mcf51mm256 Datasheet - Page 41

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mcf51mm256

Manufacturer Part Number
mcf51mm256
Description
32-bit Coldfire V1 Central Processor Unit
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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1
2
3
4
No.
Numbers in this column identify elements in
All timing is shown with respect to 20% V
rate control disabled and high drive strength enabled for SPI output pins.
Time to data active from high-impedance state.
Hold time to high-impedance state.
10
11
12
13
(CPOL = 1)
(OUTPUT)
1
(CPOL = 0)
(OUTPUT)
(OUTPUT)
(OUTPUT)
(INPUT)
NOTES:
Data valid (after SPSCK edge)
Data hold time (outputs)
Rise time
Fall time
MISO
MOSI
1. SS output mode (MODFEN = 1, SSOE = 1).
2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1, ..., bit 6, MSB.
SCK
SCK
SS
1
Characteristic
2
6
11
MSB IN
MSB OUT
Figure 15. SPI Master Timing (CPHA = 0)
2
2
Table 22. SPI Timing (continued)
7
DD
4
5
2
Figure 15
and 70% V
Master
Master
Output
Output
Slave
Slave
Input
Input
2
through
DD
5
4
BIT 6 . . . 1
BIT 6 . . . 1
Symbol
, unless noted; 100 pF load on all SPI pins. All timing assumes slew
11
t
t
t
t
HO
RO
t
FO
t
RI
FI
v
Figure
18.
Min
0
0
LSB IN
LSB OUT
Preliminary Electrical Characteristics
t
t
cyc
cyc
Max
25
25
25
25
– 25
– 25
12
Unit
ns
ns
ns
ns
ns
ns
ns
ns
3
C
D
D
D
D
41

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