c15bc1 aptina, c15bc1 Datasheet - Page 25

• Manufacturer Part Number: c15bc1
• Description: Mt9d014 1/4-inch 2mp Cmos Digital Image Sensor
• Manufacturer: aptina

Output Data Timing
Changing Registers while Streaming
PDF: 0526161444/Source:6112702771
MT0D014_DS - Rev. J 5/10 EN
Caution
The output FIFO acts as a boundary between two clock domains. Data is written to the
FIFO in the VT (video timing) clock domain. Data is read out of the FIFO in the OP
(output) clock domain.
When the scaler is disabled, the data rate in the VT clock domain is constant and
uniform during the active period of each pixel array row readout. When the scaler is
enabled, the data rate in the VT clock domain becomes intermittent, corresponding to
the data reduction performed by the scaler.
Maximum frame rate is achieved by setting the video timing clock (vt_clk_freq_mhz) to
80 MHz and using the FIFO to reduce horizontal blanking data rate to 640 Mb/s. At this
setting, a maximum frame rate of 30.05 fps can be achieved.
A key constraint when configuring the clock for the output FIFO is that the frame rate
out of the FIFO must exactly match the frame rate into the FIFO. When the scaler is
disabled, this constraint can be met by imposing the rule that the row time on the CCP2
data stream must be greater than or equal to the row time at the pixel array. The row time
on the CCP2 data stream is calculated from the x_output_size and the ccp_data_format
(8 or 10 bits per pixel), and must include the time taken in the CCP2 data stream for start
of frame/row, end of row/frame and checksum symbols.
If this constraint is not met, the FIFO will either underrun or overrun. FIFO underrun or overrun is
a fatal error condition that is signalled through the data path_status register (R0x306A).
The following registers should only be reprogrammed while the sensor is in software
standby:
• ccp2_channel_identifier
• ccp2_signalling_mode
• ccp_data_format
• scale_m
• vt_pix_clk_div
• vt_sys_clk_div
• pre_pll_clk_div
• pll_multiplier
• op_pix_clk_div
• op_sys_clk_div
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MT9D014: 1/4-Inch 2Mp CMOS Digital Image Sensor
Aptina reserves the right to change products or specifications without notice.
Programming Restrictions
©2007 Aptina Imaging Corporation. All rights reserved.
Preliminary