mcm63r836 Freescale Semiconductor, Inc, mcm63r836 Datasheet - Page 19

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mcm63r836

Manufacturer Part Number
mcm63r836
Description
8m Late Write Hstl
Manufacturer
Freescale Semiconductor, Inc
Datasheet
* Instruction codes expressed in binary; MSB on left, LSB on right.
MOTOROLA FAST SRAM
STANDARD (PUBLIC) INSTRUCTION CODES
STANDARD (PRIVATE) INSTRUCTION CODES
EXTEST
IDCODE
SAMPLE/PRELOAD
BYPASS
SAMPLE–Z
** Default instruction automatically loaded at power–up and in test–logic–reset state.
NO OP
NO OP
NO OP
* Instruction codes expressed in binary; MSB on left, LSB on right.
Instruction
Instruction
NOTE: The value adjacent to each state transition represents the signal present at TMS at the rising edge of TCK.
1
0
TEST–LOGIC
RUN–TEST/
RESET
0
IDLE
Code*
Code*
001**
000
100
010
101
111
011
110
1
Freescale Semiconductor, Inc.
For More Information On This Product,
Captures I/O ring contents. Places the boundary scan register between TDI and TDO. Forces all
DQ pins to High–Z state. NOT IEEE 1149.1 COMPLIANT.
Preloads ID register and places it between TDI and TDO. Does not affect RAM operation.
Captures I/O ring contents. Places the boundary scan register between TDI and TDO. Does not
affect RAM operation. Does not implement IEEE 1149.1 PRELOAD function. NOT IEEE 1149.1
COMPLIANT.
Places bypass register between TDI and TDO. Does not affect RAM operation.
Captures I/O ring contents. Places the boundary scan register between TDI and TDO. Forces all
DQ pins drivers to High–Z state.
Do not use these instructions; they are reserved for future use.
Do not use these instructions; they are reserved for future use.
Do not use these instructions; they are reserved for future use.
Figure 6. TAP Controller State Diagram
Go to: www.freescale.com
1
0
1
CAPTURE–DR
UPDATE–DR
PAUSE–DR
SHIFT–DR
DR–SCAN
EXIT1–DR
EXIT2–DR
SELECT
0
0
1
0
1
1
0
0
0
1
1
Description
Description
0
1
1
CAPTURE–IR
UPDATE–IR
PAUSE–IR
MCM63R836 MCM63R918
IR–SCAN
SHIFT–IR
EXIT1–IR
EXIT2–IR
SELECT
0
0
1
0
1
1
0
0
0
1
1
19

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