ltc4268cdkd-1-trpbf Linear Technology Corporation, ltc4268cdkd-1-trpbf Datasheet - Page 19

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ltc4268cdkd-1-trpbf

Manufacturer Part Number
ltc4268cdkd-1-trpbf
Description
High Power Pd With Synchronous Noopto Flyback Controller
Manufacturer
Linear Technology Corporation
Datasheet
APPLICATIONS INFORMATION
UNDERVOLTAGE LOCKOUT
The IEEE 802.3af specifi cation dictates a maximum turn-on
voltage of 42V and a minimum turn-off voltage of 30V for
the PD. In addition, the PD must maintain large on-off
hysteresis to prevent current-resistance (I-R) drops in the
wiring between the PSE and the PD from causing start-up
oscillation. The LTC4268-1 incorporates an undervoltage
lockout (UVLO) circuit that monitors line voltage at
V
(Figure 7). Before power is applied to the load, the V
pin is high impedance and there is no charge on capacitor
C1. When the input voltage rises above the UVLO turn-on
threshold, the LTC4268-1 removes the classifi cation load
current and turns on the internal power MOSFET. C1
charges up under LTC4268-1 inrush current limit control
and the V
in Figure 3. The LTC4268-1 includes a hysteretic UVLO
circuit on V
until the magnitude of the input voltage falls below the
UVLO turn-off threshold. Once V
turn-off, the internal power MOSFET disconnects V
from V
C1 will discharge through the PD circuitry and the V
pin will go to a high impedance state.
PORTN
PORTN
to determine when to apply power to the PD load
NEG
PORTN
pin transitions from 0V to V
and the classifi cation current is re-enabled.
that keeps power applied to the load
PSE
PORTN
TO
falls below UVLO
V
LTC4268-1
Figure 7. LTC4268-1 Undervoltage Lockout
PORTN
PORTN
V
VOLTAGE
0V TO UVLO*
>UVLO*
*UVLO INCLUDES HYSTERESIS
RISING INPUT THRESHOLD –38.9V
FALLING INPUT THRESHOLD –30.6V
PORT
UNDERVOLTAGE
LOCKOUT
CIRCUIT
as shown
NEG
NEG
NEG
POWER MOSFET
LTC4268-1
OFF
ON
INPUT CURRENT LIMIT
IEEE 802.3af specifi es a maximum inrush current and also
specifi es a minimum load capacitor between the V
and V
system the LTC4268-1 integrates a dual current limit circuit
using an onboard power MOSFET and sense resistor to
provide a complete inrush control circuit without additional
external components. At turn-on, the LTC4268-1 will limit
the inrush current to I
tor to ramp up to the line voltage in a controlled manner
without interference from the PSE current limit. By keeping
the PD current limit below the PSE current limit, PD power
up characteristics are well controlled and independent of
PSE behavior. This ensures interoperability regardless of
PSE output characteristics.
After load capacitor C1 is charged up, the LTC4268-1
switches to the high input current limit, I
allows the LTC4268-1 to deliver up to 35W to the PD load
for high power applications. To maintain compatibility
with IEEE 802.3af power levels, it is necessary for the PD
designer to ensure the PD steady-state power consumption
remains below the limits shown in Table 2. The LTC4268-1
maintains the high input current limit until the port voltage
drops below the UVLO turn-off threshold.
V
PORTP
V
NEG
NEG
pins. To control turn-on surge currents in the
MIN
CURRENT-LIMITED
TURN ON
5μF
C1
+
42681 F07
LIMIT_LOW
V
IN
, allowing the load capaci-
LTC4268-1
LIMIT_HIGH
19
PORTP
. This
42681fa

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